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author | Emilio G. Cota <cota@braap.org> | 2017-07-14 18:29:47 -0400 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2017-10-24 13:53:41 -0700 |
commit | f9f46db444a2dfc2ebf1f9f7d4b42163ab33187d (patch) | |
tree | 9547c37b9e4c1250a0d62e8a5264464f75298f61 | |
parent | 2399d4e7cec22ecf1c51062d2ebfd45220dbaace (diff) | |
download | qemu-f9f46db444a2dfc2ebf1f9f7d4b42163ab33187d.zip |
target/hppa: check CF_PARALLEL instead of parallel_cpus
Thereby decoupling the resulting translated code from the current state
of the system.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | target/hppa/helper.h | 2 | ||||
-rw-r--r-- | target/hppa/op_helper.c | 32 | ||||
-rw-r--r-- | target/hppa/translate.c | 12 |
3 files changed, 40 insertions, 6 deletions
diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 789f07fc0a..0a6b900555 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -3,7 +3,9 @@ DEF_HELPER_FLAGS_2(tsv, TCG_CALL_NO_WG, void, env, tl) DEF_HELPER_FLAGS_2(tcond, TCG_CALL_NO_WG, void, env, tl) DEF_HELPER_FLAGS_3(stby_b, TCG_CALL_NO_WG, void, env, tl, tl) +DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tl) +DEF_HELPER_FLAGS_3(stby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tl) DEF_HELPER_FLAGS_1(probe_r, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(probe_w, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index c05c0d5572..3104404e8d 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -76,7 +76,8 @@ static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val, #endif } -void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ulong val) +static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ulong val, + bool parallel) { uintptr_t ra = GETPC(); @@ -89,7 +90,7 @@ void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ulong val) break; case 1: /* The 3 byte store must appear atomic. */ - if (parallel_cpus) { + if (parallel) { atomic_store_3(env, addr, val, 0x00ffffffu, ra); } else { cpu_stb_data_ra(env, addr, val >> 16, ra); @@ -102,14 +103,26 @@ void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ulong val) } } -void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ulong val) +void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ulong val) +{ + do_stby_b(env, addr, val, false); +} + +void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr, + target_ulong val) +{ + do_stby_b(env, addr, val, true); +} + +static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ulong val, + bool parallel) { uintptr_t ra = GETPC(); switch (addr & 3) { case 3: /* The 3 byte store must appear atomic. */ - if (parallel_cpus) { + if (parallel) { atomic_store_3(env, addr - 3, val, 0xffffff00u, ra); } else { cpu_stw_data_ra(env, addr - 3, val >> 16, ra); @@ -132,6 +145,17 @@ void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ulong val) } } +void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ulong val) +{ + do_stby_e(env, addr, val, false); +} + +void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr, + target_ulong val) +{ + do_stby_e(env, addr, val, true); +} + target_ulong HELPER(probe_r)(target_ulong addr) { return page_check_range(addr, 1, PAGE_READ); diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 460b4d3154..08b2c73291 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2291,9 +2291,17 @@ static DisasJumpType trans_stby(DisasContext *ctx, uint32_t insn, val = load_gpr(ctx, rt); if (a) { - gen_helper_stby_e(cpu_env, addr, val); + if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { + gen_helper_stby_e_parallel(cpu_env, addr, val); + } else { + gen_helper_stby_e(cpu_env, addr, val); + } } else { - gen_helper_stby_b(cpu_env, addr, val); + if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { + gen_helper_stby_b_parallel(cpu_env, addr, val); + } else { + gen_helper_stby_b(cpu_env, addr, val); + } } if (m) { |