diff options
author | Laurent Desnogues <laurent.desnogues@gmail.com> | 2009-08-22 13:55:06 +0200 |
---|---|---|
committer | Andrzej Zaborowski <balrog@zabor.org> | 2009-08-22 13:55:06 +0200 |
commit | f878d2d235391e427b7ed5e8406ad4e29daf50f8 (patch) | |
tree | 4c5d36fb1854a773210d1953ed2554dde3bf8ef4 | |
parent | 10ee2aaa417d8d8978cdb2bbed55ebb152df5f6b (diff) | |
download | qemu-f878d2d235391e427b7ed5e8406ad4e29daf50f8.zip |
ARM back-end: Add TCG not
this patch:
- implements TCG not.
Laurent
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
-rw-r--r-- | tcg/arm/tcg-target.c | 5 | ||||
-rw-r--r-- | tcg/arm/tcg-target.h | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 672373d3ea..6b55762b65 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1427,6 +1427,10 @@ static inline void tcg_out_op(TCGContext *s, int opc, case INDEX_op_neg_i32: tcg_out_dat_imm(s, COND_AL, ARITH_RSB, args[0], args[1], 0); break; + case INDEX_op_not_i32: + tcg_out_dat_reg(s, COND_AL, + ARITH_MVN, args[0], 0, args[1], SHIFT_IMM_LSL(0)); + break; case INDEX_op_mul_i32: tcg_out_mul32(s, COND_AL, args[0], args[1], args[2]); break; @@ -1561,6 +1565,7 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_or_i32, { "r", "r", "rI" } }, { INDEX_op_xor_i32, { "r", "r", "rI" } }, { INDEX_op_neg_i32, { "r", "r" } }, + { INDEX_op_not_i32, { "r", "r" } }, { INDEX_op_shl_i32, { "r", "r", "ri" } }, { INDEX_op_shr_i32, { "r", "r", "ri" } }, diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 7ff29281b6..71e1ec550a 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -33,6 +33,7 @@ #define TCG_TARGET_HAS_ext16s_i32 #define TCG_TARGET_HAS_neg_i32 #undef TCG_TARGET_HAS_neg_i64 +#define TCG_TARGET_HAS_not_i32 #undef TCG_TARGET_STACK_GROWSUP enum { |