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author | Alex Bennée <alex.bennee@linaro.org> | 2014-04-16 12:29:39 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:07 +0100 |
commit | e44a90c59697cf98e05619fbb6f77a403d347495 (patch) | |
tree | 00663246afe656b777e3c218cfea25e7ed32ffc2 | |
parent | 33bbd75a7c3321432fe40a8cbacd64619c56138c (diff) | |
download | qemu-e44a90c59697cf98e05619fbb6f77a403d347495.zip |
target-arm: A64: fix unallocated test of scalar SQXTUN
The test for the U bit was incorrectly inverted in the scalar case of SQXTUN.
This doesn't affect the vector case as the U bit is used to select XTN(2).
Reported-by: Hao Liu <hao.liu@arm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target-arm/translate-a64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 188287d031..d86b8ffa55 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -7708,7 +7708,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn) } break; case 0x12: /* SQXTUN */ - if (u) { + if (!u) { unallocated_encoding(s); return; } |