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| author | Bin Meng <bmeng.cn@gmail.com> | 2019-03-17 01:03:11 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-03-19 05:18:42 -0700 |
| commit | a9ec1c76d57491602b4d3b521f898905825ca848 (patch) | |
| tree | c92ba2a23b71389ac9c5f68db0d60aca5d381396 | |
| parent | 4e85ea82c1b2cd7c27970b671cd4ca6ef6f78354 (diff) | |
| download | qemu-a9ec1c76d57491602b4d3b521f898905825ca848.zip | |
riscv: sifive_u: Correct UART0's IRQ in the device tree
The UART0's interrupt vector is wrongly set to 1 in the device tree.
Use SIFIVE_U_UART0_IRQ instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| -rw-r--r-- | hw/riscv/sifive_u.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 3199238ba0..5ecc47cea3 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -244,7 +244,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", SIFIVE_U_CLOCK_FREQ / 2); qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle); - qemu_fdt_setprop_cells(fdt, nodename, "interrupts", 1); + qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); qemu_fdt_add_subnode(fdt, "/chosen"); qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename); |