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| author | Richard Henderson <rth@twiddle.net> | 2014-08-06 12:11:25 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@redhat.com> | 2014-09-29 14:55:27 -0400 |
| commit | 9d6a7a8542b17f5a98a60268d1c185bc81edb1a7 (patch) | |
| tree | 249f750bd522f3885b68837dfdeab74937f44ed4 | |
| parent | 321b6c058544c136341bf9cc6055f127f307f03e (diff) | |
| download | qemu-9d6a7a8542b17f5a98a60268d1c185bc81edb1a7.zip | |
tcg-sparc: Use ADDXC in setcond_i64
Similar to the ADDC tricks we use in setcond_i32.
Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | tcg/sparc/tcg-target.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 3b232d6333..d0bd08cb85 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -716,6 +716,23 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret, static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg c1, int32_t c2, int c2const) { + if (use_vis3_instructions) { + switch (cond) { + case TCG_COND_NE: + if (c2 != 0) { + break; + } + c2 = c1, c2const = 0, c1 = TCG_REG_G0; + /* FALLTHRU */ + case TCG_COND_LTU: + tcg_out_cmp(s, c1, c2, c2const); + tcg_out_arith(s, ret, TCG_REG_G0, TCG_REG_G0, ARITH_ADDXC); + return; + default: + break; + } + } + /* For 64-bit signed comparisons vs zero, we can avoid the compare if the input does not overlap the output. */ if (c2 == 0 && !is_unsigned_cond(cond) && c1 != ret) { |