diff options
| author | Stefan Markovic <smarkovic@wavecomp.com> | 2018-08-02 16:16:33 +0200 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-08-24 17:51:59 +0200 |
| commit | 7a5f784aa215df6bf5d674b4003f8df43bf3b2d4 (patch) | |
| tree | 91fe57ce9a52f5203d7e0593b9b210fa264a442c | |
| parent | fb32f8c8560be7ca4e323cee1b839701126401d1 (diff) | |
| download | qemu-7a5f784aa215df6bf5d674b4003f8df43bf3b2d4.zip | |
target/mips: Add updating BadInstr and BadInstrX for nanoMIPS
Update BadInstr and BadInstrX registers for nanoMIPS. The same
support for pre-nanoMIPS remains unimplemented.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
| -rw-r--r-- | target/mips/helper.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/target/mips/helper.c b/target/mips/helper.c index e215af9a41..f0c268b83c 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -682,6 +682,22 @@ static void set_hflags_for_handler (CPUMIPSState *env) static inline void set_badinstr_registers(CPUMIPSState *env) { + if (env->insn_flags & ISA_NANOMIPS32) { + if (env->CP0_Config3 & (1 << CP0C3_BI)) { + uint32_t instr = (cpu_lduw_code(env, env->active_tc.PC)) << 16; + if ((instr & 0x10000000) == 0) { + instr |= cpu_lduw_code(env, env->active_tc.PC + 2); + } + env->CP0_BadInstr = instr; + + if ((instr & 0xFC000000) == 0x60000000) { + instr = cpu_lduw_code(env, env->active_tc.PC + 4) << 16; + env->CP0_BadInstrX = instr; + } + } + return; + } + if (env->hflags & MIPS_HFLAG_M16) { /* TODO: add BadInstr support for microMIPS */ return; |