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authorDavid Hildenbrand <david@redhat.com>2019-04-11 11:00:30 +0200
committerDavid Hildenbrand <david@redhat.com>2019-05-17 10:54:13 +0200
commit5bc4a20faba0fe3493bcaddf5b516528d994dd7e (patch)
tree049c90b04df0ec3b2736ff221caa93eb1a4c3bb7
parent2bf3ee38f1f8462d5267ce584182cfe448398e10 (diff)
downloadqemu-5bc4a20faba0fe3493bcaddf5b516528d994dd7e.zip
s390x/tcg: Implement VECTOR NAND
Part of vector enhancements facility 1, but easy to implement. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
-rw-r--r--target/s390x/insn-data.def2
-rw-r--r--target/s390x/translate.c1
-rw-r--r--target/s390x/translate_vx.inc.c7
3 files changed, 10 insertions, 0 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 2c794a2744..bc8b84e1c2 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1134,6 +1134,8 @@
F(0xe7a7, VMO, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
/* VECTOR MULTIPLY LOGICAL ODD */
F(0xe7a5, VMLO, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
+/* VECTOR NAND */
+ F(0xe76e, VNN, VRR_c, VE, 0, 0, 0, 0, vnn, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index da8f5b469d..fa57b7550e 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -6093,6 +6093,7 @@ enum DisasInsnEnum {
#define FAC_PCI S390_FEAT_ZPCI /* z/PCI facility */
#define FAC_AIS S390_FEAT_ADAPTER_INT_SUPPRESSION
#define FAC_V S390_FEAT_VECTOR /* vector facility */
+#define FAC_VE S390_FEAT_VECTOR_ENH /* vector enhancements facility 1 */
static const DisasInsn insn_info[] = {
#include "insn-data.def"
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index bf212b77bb..7fcb7085e5 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -1791,3 +1791,10 @@ static DisasJumpType op_vm(DisasContext *s, DisasOps *o)
get_field(s->fields, v3), fn);
return DISAS_NEXT;
}
+
+static DisasJumpType op_vnn(DisasContext *s, DisasOps *o)
+{
+ gen_gvec_fn_3(nand, ES_8, get_field(s->fields, v1),
+ get_field(s->fields, v2), get_field(s->fields, v3));
+ return DISAS_NEXT;
+}