diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-11-09 09:15:41 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 19:58:54 +0100 |
| commit | 547b9b17f9cbe7bc16db73f4aaceeead54c03f29 (patch) | |
| tree | d2dac7034aab55508b60a855591216e5204dd923 | |
| parent | 34cffe960e494ae6dc79efeb87fc3e79fe7de90c (diff) | |
| download | qemu-547b9b17f9cbe7bc16db73f4aaceeead54c03f29.zip | |
target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN
Replace magic values related to page size:
12 -> TARGET_PAGE_BITS_MIN
13 -> CP0PM_MASK
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <20201109090422.2445166-2-f4bug@amsat.org>
| -rw-r--r-- | target/mips/cp0_helper.c | 5 | ||||
| -rw-r--r-- | target/mips/helper.c | 4 |
2 files changed, 5 insertions, 4 deletions
diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index a1b5140cca..e8b9343ec9 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -904,7 +904,7 @@ void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) goto invalid; } /* We don't support VTLB entry smaller than target page */ - if ((maskbits + 12) < TARGET_PAGE_BITS) { + if ((maskbits + TARGET_PAGE_BITS_MIN) < TARGET_PAGE_BITS) { goto invalid; } env->CP0_PageMask = mask << CP0PM_MASK; @@ -913,7 +913,8 @@ void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) invalid: /* When invalid, set to default target page size. */ - env->CP0_PageMask = (~TARGET_PAGE_MASK >> 12) << CP0PM_MASK; + mask = (~TARGET_PAGE_MASK >> TARGET_PAGE_BITS_MIN); + env->CP0_PageMask = mask << CP0PM_MASK; } void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1) diff --git a/target/mips/helper.c b/target/mips/helper.c index 063b65c052..041432489d 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -858,8 +858,8 @@ refill: break; } } - pw_pagemask = m >> 12; - update_pagemask(env, pw_pagemask << 13, &pw_pagemask); + pw_pagemask = m >> TARGET_PAGE_BITS_MIN; + update_pagemask(env, pw_pagemask << CP0PM_MASK, &pw_pagemask); pw_entryhi = (address & ~0x1fff) | (env->CP0_EntryHi & 0xFF); { target_ulong tmp_entryhi = env->CP0_EntryHi; |