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author | Andreas Färber <afaerber@suse.de> | 2013-07-03 02:45:17 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-07-09 21:33:04 +0200 |
commit | 518e9d7d486273f4ee8d38946e73a7483aca4a92 (patch) | |
tree | 712ea3300cd5d92fe6593abd65d3c9bf81c7d9b9 | |
parent | ca4c810aab853788e907a791f8edea68ac30b0e8 (diff) | |
download | qemu-518e9d7d486273f4ee8d38946e73a7483aca4a92.zip |
target-i386: Change do_smm_enter() argument to X86CPU
Prepares for log_cpu_state_mask() changing argument to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
-rw-r--r-- | cpu-exec.c | 2 | ||||
-rw-r--r-- | target-i386/cpu.h | 2 | ||||
-rw-r--r-- | target-i386/smm_helper.c | 5 |
3 files changed, 5 insertions, 4 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index 503b103c3d..58a0674823 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -331,7 +331,7 @@ int cpu_exec(CPUArchState *env) cpu_svm_check_intercept_param(env, SVM_EXIT_SMI, 0); cpu->interrupt_request &= ~CPU_INTERRUPT_SMI; - do_smm_enter(env); + do_smm_enter(x86_env_get_cpu(env)); next_tb = 0; } else if ((interrupt_request & CPU_INTERRUPT_NMI) && !(env->hflags2 & HF2_NMI_MASK)) { diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 28496723bd..2d005b3ce9 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1220,7 +1220,7 @@ void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1); /* seg_helper.c */ void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw); -void do_smm_enter(CPUX86State *env1); +void do_smm_enter(X86CPU *cpu); void cpu_report_tpr_access(CPUX86State *env, TPRAccess access); diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c index 248957337e..78abe5b83f 100644 --- a/target-i386/smm_helper.c +++ b/target-i386/smm_helper.c @@ -24,7 +24,7 @@ #if defined(CONFIG_USER_ONLY) -void do_smm_enter(CPUX86State *env) +void do_smm_enter(X86CPU *cpu) { } @@ -40,8 +40,9 @@ void helper_rsm(CPUX86State *env) #define SMM_REVISION_ID 0x00020000 #endif -void do_smm_enter(CPUX86State *env) +void do_smm_enter(X86CPU *cpu) { + CPUX86State *env = &cpu->env; target_ulong sm_state; SegmentCache *dt; int i, offset; |