diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2017-03-03 17:28:49 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-03-04 14:05:48 +0000 |
| commit | 4ae4b609ee2d5bcc9df6c03c21dc1fed527aada1 (patch) | |
| tree | b2263a118eaaaed3adceddcba593e296cd3142cd | |
| parent | eff235eb2bcd7092901f4698a7907e742f3b7f2f (diff) | |
| download | qemu-4ae4b609ee2d5bcc9df6c03c21dc1fed527aada1.zip | |
nios2: avoid anonymous unions in designated initializers.
These cause compilation failures on CentOS 6 or other operating
systems with older GCCs.
Cc: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/nios2/translate.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 2d738391ad..cfec47959d 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -48,14 +48,14 @@ struct { \ uint8_t op; \ union { \ - uint16_t imm16; \ - int16_t imm16s; \ - }; \ + uint16_t u; \ + int16_t s; \ + } imm16; \ uint8_t b; \ uint8_t a; \ } (instr) = { \ .op = extract32((code), 0, 6), \ - .imm16 = extract32((code), 6, 16), \ + .imm16.u = extract32((code), 6, 16), \ .b = extract32((code), 22, 5), \ .a = extract32((code), 27, 5), \ } @@ -232,7 +232,7 @@ static void gen_ldx(DisasContext *dc, uint32_t code, uint32_t flags) data = tcg_temp_new(); } - tcg_gen_addi_tl(addr, load_gpr(dc, instr.a), instr.imm16s); + tcg_gen_addi_tl(addr, load_gpr(dc, instr.a), instr.imm16.s); tcg_gen_qemu_ld_tl(data, addr, dc->mem_idx, flags); if (unlikely(instr.b == R_ZERO)) { @@ -249,7 +249,7 @@ static void gen_stx(DisasContext *dc, uint32_t code, uint32_t flags) TCGv val = load_gpr(dc, instr.b); TCGv addr = tcg_temp_new(); - tcg_gen_addi_tl(addr, load_gpr(dc, instr.a), instr.imm16s); + tcg_gen_addi_tl(addr, load_gpr(dc, instr.a), instr.imm16.s); tcg_gen_qemu_st_tl(val, addr, dc->mem_idx, flags); tcg_temp_free(addr); } @@ -259,7 +259,7 @@ static void br(DisasContext *dc, uint32_t code, uint32_t flags) { I_TYPE(instr, code); - gen_goto_tb(dc, 0, dc->pc + 4 + (instr.imm16s & -4)); + gen_goto_tb(dc, 0, dc->pc + 4 + (instr.imm16.s & -4)); dc->is_jmp = DISAS_TB_JUMP; } @@ -271,7 +271,7 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_brcond_tl(flags, dc->cpu_R[instr.a], dc->cpu_R[instr.b], l1); gen_goto_tb(dc, 0, dc->pc + 4); gen_set_label(l1); - gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16s & -4)); + gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16.s & -4)); dc->is_jmp = DISAS_TB_JUMP; } @@ -284,8 +284,8 @@ static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ (op3)); \ } -gen_i_cmpxx(gen_cmpxxsi, instr.imm16s) -gen_i_cmpxx(gen_cmpxxui, instr.imm16) +gen_i_cmpxx(gen_cmpxxsi, instr.imm16.s) +gen_i_cmpxx(gen_cmpxxui, instr.imm16.u) /* Math/logic instructions */ #define gen_i_math_logic(fname, insn, resimm, op3) \ @@ -302,16 +302,16 @@ static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ } \ } -gen_i_math_logic(addi, addi, 1, instr.imm16s) -gen_i_math_logic(muli, muli, 0, instr.imm16s) +gen_i_math_logic(addi, addi, 1, instr.imm16.s) +gen_i_math_logic(muli, muli, 0, instr.imm16.s) -gen_i_math_logic(andi, andi, 0, instr.imm16) -gen_i_math_logic(ori, ori, 1, instr.imm16) -gen_i_math_logic(xori, xori, 1, instr.imm16) +gen_i_math_logic(andi, andi, 0, instr.imm16.u) +gen_i_math_logic(ori, ori, 1, instr.imm16.u) +gen_i_math_logic(xori, xori, 1, instr.imm16.u) -gen_i_math_logic(andhi, andi, 0, instr.imm16 << 16) -gen_i_math_logic(orhi , ori, 1, instr.imm16 << 16) -gen_i_math_logic(xorhi, xori, 1, instr.imm16 << 16) +gen_i_math_logic(andhi, andi, 0, instr.imm16.u << 16) +gen_i_math_logic(orhi , ori, 1, instr.imm16.u << 16) +gen_i_math_logic(xorhi, xori, 1, instr.imm16.u << 16) /* Prototype only, defined below */ static void handle_r_type_instr(DisasContext *dc, uint32_t code, |