diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-02-19 14:45:43 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-08 17:20:01 +0000 |
| commit | 446587a914cfa57c2ce529056a9ca2215bde7111 (patch) | |
| tree | de79db22acd634631366e7a1728119f0b337fced | |
| parent | c89cef3a2cdfb355258890db8cfd2175add5bbee (diff) | |
| download | qemu-446587a914cfa57c2ce529056a9ca2215bde7111.zip | |
hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR
For SSE-300, the SYSINFO register block has two new registers:
* SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3;
since the SSE-300 can only be configured with a single CPU it
is always zero
* IIDR is the subsystem implementation identity register;
its value is set by the SoC integrator, so we plumb this in from
the armsse.c code as we do with SYS_VERSION and SYS_CONFIG
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-11-peter.maydell@linaro.org
| -rw-r--r-- | hw/arm/armsse.c | 5 | ||||
| -rw-r--r-- | hw/misc/iotkit-sysinfo.c | 22 | ||||
| -rw-r--r-- | include/hw/misc/iotkit-sysinfo.h | 1 |
3 files changed, 28 insertions, 0 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 113a783a46..326e161c8d 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -30,6 +30,7 @@ struct ARMSSEInfo { int sram_banks; int num_cpus; uint32_t sys_version; + uint32_t iidr; uint32_t cpuwait_rst; bool has_mhus; bool has_ppus; @@ -70,6 +71,7 @@ static const ARMSSEInfo armsse_variants[] = { .sram_banks = 1, .num_cpus = 1, .sys_version = 0x41743, + .iidr = 0, .cpuwait_rst = 0, .has_mhus = false, .has_ppus = false, @@ -84,6 +86,7 @@ static const ARMSSEInfo armsse_variants[] = { .sram_banks = 4, .num_cpus = 2, .sys_version = 0x22041743, + .iidr = 0, .cpuwait_rst = 2, .has_mhus = true, .has_ppus = true, @@ -950,6 +953,8 @@ static void armsse_realize(DeviceState *dev, Error **errp) } object_property_set_int(OBJECT(&s->sysinfo), "sse-version", info->sse_version, &error_abort); + object_property_set_int(OBJECT(&s->sysinfo), "IIDR", + info->iidr, &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->sysinfo), errp)) { return; } diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c index 4bd3fd4c8f..aaa9305b2e 100644 --- a/hw/misc/iotkit-sysinfo.c +++ b/hw/misc/iotkit-sysinfo.c @@ -30,6 +30,8 @@ REG32(SYS_VERSION, 0x0) REG32(SYS_CONFIG, 0x4) +REG32(SYS_CONFIG1, 0x8) +REG32(IIDR, 0xfc8) REG32(PID4, 0xfd0) REG32(PID5, 0xfd4) REG32(PID6, 0xfd8) @@ -70,6 +72,24 @@ static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset, case A_SYS_CONFIG: r = s->sys_config; break; + case A_SYS_CONFIG1: + switch (s->sse_version) { + case ARMSSE_SSE300: + return 0; + break; + default: + goto bad_read; + } + break; + case A_IIDR: + switch (s->sse_version) { + case ARMSSE_SSE300: + return s->iidr; + break; + default: + goto bad_read; + } + break; case A_PID4 ... A_CID3: switch (s->sse_version) { case ARMSSE_SSE300: @@ -81,6 +101,7 @@ static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset, } break; default: + bad_read: qemu_log_mask(LOG_GUEST_ERROR, "IoTKit SysInfo read: bad offset %x\n", (int)offset); r = 0; @@ -114,6 +135,7 @@ static Property iotkit_sysinfo_props[] = { DEFINE_PROP_UINT32("SYS_VERSION", IoTKitSysInfo, sys_version, 0), DEFINE_PROP_UINT32("SYS_CONFIG", IoTKitSysInfo, sys_config, 0), DEFINE_PROP_UINT32("sse-version", IoTKitSysInfo, sse_version, 0), + DEFINE_PROP_UINT32("IIDR", IoTKitSysInfo, iidr, 0), DEFINE_PROP_END_OF_LIST() }; diff --git a/include/hw/misc/iotkit-sysinfo.h b/include/hw/misc/iotkit-sysinfo.h index 91bd14bdbf..91c23f90d2 100644 --- a/include/hw/misc/iotkit-sysinfo.h +++ b/include/hw/misc/iotkit-sysinfo.h @@ -39,6 +39,7 @@ struct IoTKitSysInfo { uint32_t sys_version; uint32_t sys_config; uint32_t sse_version; + uint32_t iidr; }; #endif |