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authorJim Shu <cwshu@andestech.com>2021-02-21 22:01:22 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-03-22 21:54:40 -0400
commit2c2e0f2842520bcd25472285cfce39696e52e662 (patch)
treedfa536297189fe025649cf233f893bc7b0b3da22
parent663e119317d77780949830226f5575305405ab75 (diff)
downloadqemu-2c2e0f2842520bcd25472285cfce39696e52e662.zip
target/riscv: flush TLB pages if PMP permission has been changed
If PMP permission of any address has been changed by updating PMP entry, flush all TLB pages to prevent from getting old permission. Signed-off-by: Jim Shu <cwshu@andestech.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1613916082-19528-4-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
-rw-r--r--target/riscv/pmp.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index ebd874cde3..cff020122a 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -28,6 +28,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "trace.h"
+#include "exec/exec-all.h"
static void pmp_write_cfg(CPURISCVState *env, uint32_t addr_index,
uint8_t val);
@@ -347,6 +348,9 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
cfg_val = (val >> 8 * i) & 0xff;
pmp_write_cfg(env, (reg_index * 4) + i, cfg_val);
}
+
+ /* If PMP permission of any addr has been changed, flush TLB pages. */
+ tlb_flush(env_cpu(env));
}