diff options
author | David Gibson <david@gibson.dropbear.id.au> | 2018-03-23 14:32:48 +1100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2018-04-27 18:05:22 +1000 |
commit | 26cd35b8613881c410d5226e6dc56e7bfb4b83d1 (patch) | |
tree | 4a9b5ddd032caf4852e067364816261f52cb20b5 | |
parent | 58969eeece99abd6d31d530ad371e789419ec9bf (diff) | |
download | qemu-26cd35b8613881c410d5226e6dc56e7bfb4b83d1.zip |
target/ppc: Fold ci_large_pages flag into PPCHash64Options
The ci_large_pages boolean in CPUPPCState is only relevant to 64-bit hash
MMU machines, indicating whether it's possible to map large (> 4kiB) pages
as cache-inhibitied (i.e. for IO, rather than memory). Fold it as another
flag into the PPCHash64Options structure.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
-rw-r--r-- | hw/ppc/spapr.c | 3 | ||||
-rw-r--r-- | target/ppc/cpu.h | 1 | ||||
-rw-r--r-- | target/ppc/kvm.c | 6 | ||||
-rw-r--r-- | target/ppc/mmu-hash64.c | 2 | ||||
-rw-r--r-- | target/ppc/mmu-hash64.h | 1 | ||||
-rw-r--r-- | target/ppc/translate_init.c | 3 |
6 files changed, 8 insertions, 8 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 9c26dc37e1..abf38c62e8 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -263,7 +263,6 @@ static void spapr_populate_pa_features(sPAPRMachineState *spapr, void *fdt, int offset, bool legacy_guest) { - CPUPPCState *env = &cpu->env; uint8_t pa_features_206[] = { 6, 0, 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 }; uint8_t pa_features_207[] = { 24, 0, @@ -315,7 +314,7 @@ static void spapr_populate_pa_features(sPAPRMachineState *spapr, return; } - if (env->ci_large_pages) { + if (ppc_hash64_has(cpu, PPC_HASH64_CI_LARGEPAGE)) { /* * Note: we keep CI large pages off by default because a 64K capable * guest provisioned with large pages might otherwise try to map a qemu diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 1c5c33ca11..c0c44fb91d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1090,7 +1090,6 @@ struct CPUPPCState { #if defined(TARGET_PPC64) ppc_slb_t vrma_slb; target_ulong rmls; - bool ci_large_pages; #endif #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index b53af75ecf..25f93dc708 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -448,7 +448,11 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) * host page size is smaller than 64K. */ if (smmu_info.flags & KVM_PPC_PAGE_SIZES_REAL) { - env->ci_large_pages = getpagesize() >= 0x10000; + if (getpagesize() >= 0x10000) { + cpu->hash64_opts->flags |= PPC_HASH64_CI_LARGEPAGE; + } else { + cpu->hash64_opts->flags &= ~PPC_HASH64_CI_LARGEPAGE; + } } /* diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index c9ee55e1ea..f341714550 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1128,7 +1128,7 @@ const PPCHash64Options ppc_hash64_opts_basic = { }; const PPCHash64Options ppc_hash64_opts_POWER7 = { - .flags = PPC_HASH64_1TSEG | PPC_HASH64_AMR, + .flags = PPC_HASH64_1TSEG | PPC_HASH64_AMR | PPC_HASH64_CI_LARGEPAGE, .sps = { { .page_shift = 12, /* 4K */ diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index b2b5d25238..f1babb0afc 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -155,6 +155,7 @@ struct PPCHash64SegmentPageSizes { struct PPCHash64Options { #define PPC_HASH64_1TSEG 0x00001 #define PPC_HASH64_AMR 0x00002 +#define PPC_HASH64_CI_LARGEPAGE 0x00004 unsigned flags; PPCHash64SegmentPageSizes sps[PPC_PAGE_SIZES_MAX_SZ]; }; diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index ae005b2a54..a925cf5cd3 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8392,7 +8392,6 @@ static void init_proc_POWER7(CPUPPCState *env) #if !defined(CONFIG_USER_ONLY) env->slb_nr = 32; #endif - env->ci_large_pages = true; env->dcache_line_size = 128; env->icache_line_size = 128; @@ -8547,7 +8546,6 @@ static void init_proc_POWER8(CPUPPCState *env) #if !defined(CONFIG_USER_ONLY) env->slb_nr = 32; #endif - env->ci_large_pages = true; env->dcache_line_size = 128; env->icache_line_size = 128; @@ -8748,7 +8746,6 @@ static void init_proc_POWER9(CPUPPCState *env) #if !defined(CONFIG_USER_ONLY) env->slb_nr = 32; #endif - env->ci_large_pages = true; env->dcache_line_size = 128; env->icache_line_size = 128; |