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authorPeter Maydell <peter.maydell@linaro.org>2019-06-11 16:02:07 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-06-11 16:02:07 +0100
commit219dca61ebf41625831d4f96a720852baf44b762 (patch)
tree0aafdb86732e2d04771a8b7205478a6e2b5fcce6
parenta578cdfbdd8f9beff5ced52b7826ddb1669abbbf (diff)
parent89a44a103315267122119b4311218d00d2561ebe (diff)
downloadqemu-219dca61ebf41625831d4f96a720852baf44b762.zip
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
x86 queue, 2019-06-11 * "unavailable-features" QOM property (Eduardo Habkost) * Save EFER for 32-bit targets (Pavel Dovgalyuk) # gpg: Signature made Tue 11 Jun 2019 14:41:45 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Save EFER for 32-bit targets i386: "unavailable-features" QOM property i386: x86_cpu_list_feature_names() function Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/i386/cpu.c55
-rw-r--r--target/i386/machine.c24
2 files changed, 66 insertions, 13 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b21ecaac17..7e5b545005 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3671,6 +3671,38 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features,
static void x86_cpu_expand_features(X86CPU *cpu, Error **errp);
static int x86_cpu_filter_features(X86CPU *cpu);
+/* Build a list with the name of all features on a feature word array */
+static void x86_cpu_list_feature_names(FeatureWordArray features,
+ strList **feat_names)
+{
+ FeatureWord w;
+ strList **next = feat_names;
+
+ for (w = 0; w < FEATURE_WORDS; w++) {
+ uint32_t filtered = features[w];
+ int i;
+ for (i = 0; i < 32; i++) {
+ if (filtered & (1UL << i)) {
+ strList *new = g_new0(strList, 1);
+ new->value = g_strdup(x86_cpu_feature_name(w, i));
+ *next = new;
+ next = &new->next;
+ }
+ }
+ }
+}
+
+static void x86_cpu_get_unavailable_features(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ X86CPU *xc = X86_CPU(obj);
+ strList *result = NULL;
+
+ x86_cpu_list_feature_names(xc->filtered_features, &result);
+ visit_type_strList(v, "unavailable-features", &result, errp);
+}
+
/* Check for missing features that may prevent the CPU class from
* running using the current machine and accelerator.
*/
@@ -3678,7 +3710,6 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
strList **missing_feats)
{
X86CPU *xc;
- FeatureWord w;
Error *err = NULL;
strList **next = missing_feats;
@@ -3705,18 +3736,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,
x86_cpu_filter_features(xc);
- for (w = 0; w < FEATURE_WORDS; w++) {
- uint32_t filtered = xc->filtered_features[w];
- int i;
- for (i = 0; i < 32; i++) {
- if (filtered & (1UL << i)) {
- strList *new = g_new0(strList, 1);
- new->value = g_strdup(x86_cpu_feature_name(w, i));
- *next = new;
- next = &new->next;
- }
- }
- }
+ x86_cpu_list_feature_names(xc->filtered_features, next);
object_unref(OBJECT(xc));
}
@@ -5623,6 +5643,15 @@ static void x86_cpu_initfn(Object *obj)
object_property_add(obj, "filtered-features", "X86CPUFeatureWordInfo",
x86_cpu_get_feature_words,
NULL, NULL, (void *)cpu->filtered_features, NULL);
+ /*
+ * The "unavailable-features" property has the same semantics as
+ * CpuDefinitionInfo.unavailable-features on the "query-cpu-definitions"
+ * QMP command: they list the features that would have prevented the
+ * CPU from running if the "enforce" flag was set.
+ */
+ object_property_add(obj, "unavailable-features", "strList",
+ x86_cpu_get_unavailable_features,
+ NULL, NULL, NULL, &error_abort);
object_property_add(obj, "crash-information", "GuestPanicInformation",
x86_cpu_get_crash_info_qom, NULL, NULL, NULL, NULL);
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 225b5d433b..2c96cfc9a2 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -964,6 +964,27 @@ static const VMStateDescription vmstate_svm_npt = {
}
};
+#ifndef TARGET_X86_64
+static bool intel_efer32_needed(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ CPUX86State *env = &cpu->env;
+
+ return env->efer != 0;
+}
+
+static const VMStateDescription vmstate_efer32 = {
+ .name = "cpu/efer32",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = intel_efer32_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64(env.efer, X86CPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+#endif
+
VMStateDescription vmstate_x86_cpu = {
.name = "cpu",
.version_id = 12,
@@ -1089,6 +1110,9 @@ VMStateDescription vmstate_x86_cpu = {
&vmstate_msr_intel_pt,
&vmstate_msr_virt_ssbd,
&vmstate_svm_npt,
+#ifndef TARGET_X86_64
+ &vmstate_efer32,
+#endif
NULL
}
};