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| author | Richard Henderson <rth@twiddle.net> | 2012-08-17 11:03:39 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:00:28 -0800 |
| commit | 11bf2d73d0dba509e14dbfc2189365410a5a2c06 (patch) | |
| tree | ae9d0bcb50ba30660b644359306b2a6c11b32202 | |
| parent | c698d8768756c66dd0dd55ea884c69c2212d59f9 (diff) | |
| download | qemu-11bf2d73d0dba509e14dbfc2189365410a5a2c06.zip | |
target-s390: Convert LOAD AND TEST
Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target-s390x/insn-data.def | 7 | ||||
| -rw-r--r-- | target-s390x/translate.c | 37 |
2 files changed, 17 insertions, 27 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 796185f002..7a8dcbd0f1 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -126,6 +126,13 @@ C(0xe371, LAY, RXY_a, LD, 0, a2, 0, r1, mov2, 0) /* LOAD ADDRESS RELATIVE LONG */ C(0xc000, LARL, RIL_b, Z, 0, ri2, 0, r1, mov2, 0) +/* LOAD AND TEST */ + C(0x1200, LTR, RR_a, Z, 0, r2_o, 0, cond_r1r2_32, mov2, s32) + C(0xb902, LTGR, RRE, Z, 0, r2_o, 0, r1, mov2, s64) + C(0xb912, LTGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, s64) + C(0xe312, LT, RXY_a, EI, 0, a2, new, r1_32, ld32s, s64) + C(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64) + C(0xe332, LTGF, RXY_a, GIE, 0, a2, r1, 0, ld32s, s64) /* LOAD BYTE */ C(0xb926, LBR, RRE, EI, 0, r2_8s, 0, r1_32, mov2, 0) C(0xb906, LGBR, RRE, EI, 0, r2_8s, 0, r1, mov2, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 840bd6e3a0..9239025169 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1349,23 +1349,6 @@ static void disas_e3(CPUS390XState *env, DisasContext* s, int op, int r1, op, r1, x2, b2, d2); addr = get_address(s, x2, b2, d2); switch (op) { - case 0x2: /* LTG R1,D2(X2,B2) [RXY] */ - case 0x4: /* LG r1,d2(x2,b2) */ - tcg_gen_qemu_ld64(regs[r1], addr, get_mem_index(s)); - if (op == 0x2) { - set_cc_s64(s, regs[r1]); - } - break; - case 0x12: /* LT R1,D2(X2,B2) [RXY] */ - tmp2 = tcg_temp_new_i64(); - tmp32_1 = tcg_temp_new_i32(); - tcg_gen_qemu_ld32s(tmp2, addr, get_mem_index(s)); - tcg_gen_trunc_i64_i32(tmp32_1, tmp2); - store_reg32(r1, tmp32_1); - set_cc_s32(s, tmp32_1); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i32(tmp32_1); - break; case 0xd: /* DSG R1,D2(X2,B2) [RXY] */ case 0x1d: /* DSGF R1,D2(X2,B2) [RXY] */ tmp2 = tcg_temp_new_i64(); @@ -3192,16 +3175,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) store_reg32(r1, tmp32_1); tcg_temp_free_i32(tmp32_1); break; - case 0x12: /* LTR R1,R2 [RR] */ - insn = ld_code2(env, s->pc); - decode_rr(s, insn, &r1, &r2); - tmp32_1 = load_reg32(r2); - if (r1 != r2) { - store_reg32(r1, tmp32_1); - } - set_cc_s32(s, tmp32_1); - tcg_temp_free_i32(tmp32_1); - break; case 0x13: /* LCR R1,R2 [RR] */ insn = ld_code2(env, s->pc); decode_rr(s, insn, &r1, &r2); @@ -4395,6 +4368,16 @@ static void cout_nz64(DisasContext *s, DisasOps *o) gen_op_update1_cc_i64(s, CC_OP_NZ, o->out); } +static void cout_s32(DisasContext *s, DisasOps *o) +{ + gen_op_update1_cc_i64(s, CC_OP_LTGT0_32, o->out); +} + +static void cout_s64(DisasContext *s, DisasOps *o) +{ + gen_op_update1_cc_i64(s, CC_OP_LTGT0_64, o->out); +} + static void cout_subs32(DisasContext *s, DisasOps *o) { gen_op_update3_cc_i64(s, CC_OP_SUB_32, o->in1, o->in2, o->out); |