diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-06-01 16:35:19 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-06-03 18:10:31 +1000 |
| commit | 0a11bb7a35075379dffafb75698dd503eb6f9b9c (patch) | |
| tree | 7dcdc66b374de081018c90bfc0102d6aae89353f | |
| parent | 5e560864234e78461879c632c414e4fe97a9a506 (diff) | |
| download | qemu-0a11bb7a35075379dffafb75698dd503eb6f9b9c.zip | |
target/ppc: Implement PNOP
The illegal suffix behavior matches what was observed in a
POWER10 DD2.0 machine.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-6-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target/ppc/insn64.decode | 67 | ||||
| -rw-r--r-- | target/ppc/translate/fixedpoint-impl.c.inc | 11 |
2 files changed, 78 insertions, 0 deletions
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 1965088915..9aa5097a98 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -28,3 +28,70 @@ PADDI 000001 10 0--.-- .................. \ 001110 ..... ..... ................ @PLS_D + +### Prefixed No-operation Instruction + +@PNOP 000001 11 0000-- 000000000000000000 \ + ................................ + +{ + [ + ## Invalid suffixes: Branch instruction + # bc[l][a] + INVALID ................................ \ + 010000-------------------------- @PNOP + # b[l][a] + INVALID ................................ \ + 010010-------------------------- @PNOP + # bclr[l] + INVALID ................................ \ + 010011---------------0000010000- @PNOP + # bcctr[l] + INVALID ................................ \ + 010011---------------1000010000- @PNOP + # bctar[l] + INVALID ................................ \ + 010011---------------1000110000- @PNOP + + ## Invalid suffixes: rfebb + INVALID ................................ \ + 010011---------------0010010010- @PNOP + + ## Invalid suffixes: context synchronizing other than isync + # sc + INVALID ................................ \ + 010001------------------------1- @PNOP + # scv + INVALID ................................ \ + 010001------------------------01 @PNOP + # rfscv + INVALID ................................ \ + 010011---------------0001010010- @PNOP + # rfid + INVALID ................................ \ + 010011---------------0000010010- @PNOP + # hrfid + INVALID ................................ \ + 010011---------------0100010010- @PNOP + # urfid + INVALID ................................ \ + 010011---------------0100110010- @PNOP + # stop + INVALID ................................ \ + 010011---------------0101110010- @PNOP + # mtmsr w/ L=0 + INVALID ................................ \ + 011111---------0-----0010010010- @PNOP + # mtmsrd w/ L=0 + INVALID ................................ \ + 011111---------0-----0010110010- @PNOP + + ## Invalid suffixes: Service Processor Attention + INVALID ................................ \ + 000000----------------100000000- @PNOP + ] + + ## Valid suffixes + PNOP ................................ \ + -------------------------------- @PNOP +} diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 344a3ed54b..ce034a14a7 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -60,3 +60,14 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a) a->si <<= 16; return trans_ADDI(ctx, a); } + +static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a) +{ + gen_invalid(ctx); + return true; +} + +static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a) +{ + return true; +} |