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author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-02-11 17:09:29 +0100 |
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committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-02-14 17:47:28 +0100 |
commit | 0454728c2283097cfa3e4e26d459725fa2c67f10 (patch) | |
tree | 87eeb2f2c0497e705391fd4c2c0f39b95175ae1c | |
parent | f5117fd28552fe3fe32ef0495582b1caaef7a28d (diff) | |
download | qemu-0454728c2283097cfa3e4e26d459725fa2c67f10.zip |
target/mips: introduce MTTCG-enabled builds
Introduce MTTCG-enabled QEMU builds for mips32, mipsn32, and mips64.
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
-rwxr-xr-x | configure | 3 | ||||
-rw-r--r-- | target/mips/cpu.h | 2 |
2 files changed, 5 insertions, 0 deletions
@@ -7192,11 +7192,13 @@ case "$target_name" in target_compiler=$cross_cc_microblaze ;; mips|mipsel) + mttcg="yes" TARGET_ARCH=mips target_compiler=$cross_cc_mips echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak ;; mipsn32|mipsn32el) + mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips target_compiler=$cross_cc_mipsn32 @@ -7204,6 +7206,7 @@ case "$target_name" in echo "TARGET_ABI32=y" >> $config_target_mak ;; mips64|mips64el) + mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips target_compiler=$cross_cc_mips64 diff --git a/target/mips/cpu.h b/target/mips/cpu.h index eccee375cb..a10eeb0de3 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -11,6 +11,8 @@ #include "exec/cpu-defs.h" #include "fpu/softfloat.h" +#define TCG_GUEST_DEFAULT_MO (0) + struct CPUMIPSState; typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; |