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author | Greg Kurz <groug@kaod.org> | 2019-12-13 13:00:35 +0100 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2019-12-17 10:59:11 +1100 |
commit | 70c059e9266fc7d79e40c9d297722ccb717ec386 (patch) | |
tree | 34d3199b03255b0dd1455282099d36284e1de8ab /.cirrus.yml | |
parent | 3caf7bd0a2874717c5cf052a9840efe9c7774f2e (diff) | |
download | qemu-70c059e9266fc7d79e40c9d297722ccb717ec386.zip |
ppc/pnv: Introduce PnvChipClass::xscom_pcba() method
The XSCOM bus is implemented with a QOM interface, which is mostly
generic from a CPU type standpoint, except for the computation of
addresses on the Pervasive Connect Bus (PCB) network. This is handled
by the pnv_xscom_pcba() function with a switch statement based on
the chip_type class level attribute of the CPU chip.
This can be achieved using QOM. Also the address argument is masked with
PNV_XSCOM_SIZE - 1, which is for POWER8 only. Addresses may have different
sizes with other CPU types. Have each CPU chip type handle the appropriate
computation with a QOM xscom_pcba() method.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157623843543.360005.13996472463887521794.stgit@bahia.lan>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to '.cirrus.yml')
0 files changed, 0 insertions, 0 deletions