blob: fd826cdbf5aa8f625bdaa143b730ee50bdf07f49 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
|
PORTNAME= iverilog
DISTVERSIONPREFIX= v
DISTVERSION= 12_0
CATEGORIES= cad
MAINTAINER= kbowling@FreeBSD.org
COMMENT= Verilog simulation and synthesis tool
WWW= https://steveicarus.github.io/iverilog/
LICENSE= GPLv2
BUILD_DEPENDS= autoconf:devel/autoconf \
gperf:devel/gperf
USES= bison compiler:c++11-lang gmake readline
USE_GITHUB= yes
GH_ACCOUNT= steveicarus
GNU_CONFIGURE= yes
CONFIGURE_ARGS= --disable-suffix
pre-configure:
@cd ${WRKSRC} && sh autoconf.sh
.include <bsd.port.mk>
|
