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Commit message (
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Author
2023-01-25
cad/veryl: Update 0.2.1 → 0.2.2
Yuri Victorovich
2023-01-25
cad/kicad: update KiCad and libraries to 6.0.11
Christoph Moench-Tegeder
2023-01-23
cad/nvc: Update 1.7.1 → 1.8.1
Yuri Victorovich
2023-01-23
cad/verilator: Update 5.004 → 5.006
Yuri Victorovich
2023-01-21
cad/freecad: fix build after ebbef4b5f8
Christoph Moench-Tegeder
2023-01-19
cad/veryl: Update 0.2.0 -> 0.2.1
Yuri Victorovich
2023-01-19
math/suitesparse*: bump PORTREVISION of dependant ports
Thierry Thomas
2023-01-18
graphics/proj: Update to 9.1.1
Loïc Bartoletti
2023-01-17
cad/veryl: Update 0.1.13 -> 0.2.0
Yuri Victorovich
2023-01-16
cad/antimony: New port: CAD from a parallel universe
Yuri Victorovich
2023-01-16
*/*: bump libboost*.so libraries consumert after Boost upgrade
Dima Panov
2023-01-14
Mk/**ruby.mk: Switch from USE_RUBY=yes to USES=ruby
Muhammad Moinur Rahman
2023-01-14
cad/klayout: Update to 0.28.3
Hiroki Sato
2023-01-11
cad/veryl: Update 0.1.8 -> 0.1.13
Yuri Victorovich
2023-01-11
cad/netgen: Update to 6.2.2031
Stephen Montgomery-Smith
2023-01-11
*/*: rename CHEESESHOP to PYPI in MASTER_SITES
Dmitry Marakasov
2023-01-09
cad/veryl: Update 0.1.3 -> 0.1.8
Yuri Victorovich
2023-01-09
cad/ngspice_rework: fix packaging
Christoph Moench-Tegeder
2023-01-08
cad/kicad-library-*-devel: Update to the latest commits
Michael Reifenberger
2023-01-08
cad/kicad-devel: Update to the latest commit
Michael Reifenberger
2023-01-08
cad/ngspice_rework: Update to 38
Kevin Zheng
2023-01-08
cad/silice: New port: Language that simplifies prototyping and writing algori...
Yuri Victorovich
2023-01-08
cad/py-edalize: New port: Library for interfacing EDA tools
Yuri Victorovich
2023-01-08
cad/py-vunit-hdl: New pert: Open source unit testing framework for VHDL/Syste...
Yuri Victorovich
2023-01-07
*/*: Bump rust (cargo) ports to reflect on WITH_LTO
Daniel Engberg
2023-01-07
cad/qelectrotech: Update to 0.9.0
Gleb Popov
2023-01-05
cad/veryl: New port: Veryl: A modern Hardware Description Language (HDL)
Yuri Victorovich
2023-01-05
cad/svls: New port: SystemVerilog language server
Yuri Victorovich
2023-01-04
cad/yosys: Update 0.24 -> 0.25
Yuri Victorovich
2023-01-02
cad/svlint: New port: SystemVerilog linter
Yuri Victorovich
2023-01-03
cad/klayout: Update to 0.28.2
Hiroki Sato
2023-01-02
cad/freecad: fix desktop integration
Max Brazhnikov
2022-12-31
cad/basicdsp: Cleanup EXPIRED ports
Muhammad Moinur Rahman
2022-12-31
cleanup: Remove expired ports:
Rene Ladan
2022-12-27
cad/irsim: Update to 9.7.116
Danilo Egea Gondolfo
2022-12-26
cad/verilator: Update 5.002 -> 5.004
Yuri Victorovich
2022-12-23
cad/py-gmsh: Update 4.11.0 -> 4.11.1
Yuri Victorovich
2022-12-22
cad/openfpgaloader: Update 0.9.1 -> 0.10.0
Yuri Victorovich
2022-12-22
cad/openroad: Fix with libfmt >= 9
Thierry Thomas
2022-12-22
cad/basicdsp: mark deprecated
Loïc Bartoletti
2022-12-21
cad/openscad-devel: Update to current 2022.12.20
Michael Reifenberger
2022-12-21
cad/openscad: Update to 2021.01.01-20221206 (current revision)
Michael Reifenberger
2022-12-21
cad/kicad-devel: fix build on powerpc
Piotr Kubaj
2022-12-20
cad/py-pygmsh: New port: Python frontend for Gmsh (on top of Gmsh's own binding)
Yuri Victorovich
2022-12-20
cad/py-gmsh: Use OpenCASCADE for additional functionality; Add Python flavors
Yuri Victorovich
2022-12-19
cad/py-gmsh: New port: Automatic 3D finite element mesh generator (gmsh's own...
Yuri Victorovich
2022-12-19
Mk/**tex.mk: Convert bsd.tex.mk to USES=tex
Muhammad Moinur Rahman
2022-12-19
*/*: chase the upgrade of devel/libfmt to 9.1.0
Thierry Thomas
2022-12-18
cad/kicad: update KiCad and supporting packages to 6.0.10
Christoph Moench-Tegeder
2022-12-18
cad/librecad: Update to 2.2.0
Jason E. Hale
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