From 4fd831e4a88fdba14751c8a71ae45fc0eac92c66 Mon Sep 17 00:00:00 2001 From: Jeremy Fitzhardinge Date: Mon, 3 Oct 2022 18:50:03 -0700 Subject: rp async i2c: raise the tx_empty threshold Assert "tx_empty" interrupt a little early so there's time to wake up and start refilling the fifo before it drains. This avoids stalling the i2c bus if the tx fifo completely drains. --- embassy-rp/src/i2c.rs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index f004c522..68cfc653 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs @@ -243,12 +243,18 @@ impl<'d, T: Instance> I2c<'d, T, Async> { if let abort_reason @ Err(_) = me.read_and_clear_abort_reason() { Poll::Ready(abort_reason) } else if !Self::tx_fifo_full() { + // resume if there's any space free in the tx fifo Poll::Ready(Ok(())) } else { Poll::Pending } }, |_me| unsafe { + // Set tx "free" threshold a little high so that we get + // woken before the fifo completely drains to minimize + // transfer stalls. + p.ic_tx_tl().write(|w| w.set_tx_tl(1)); + p.ic_intr_mask().modify(|w| { w.set_m_tx_empty(true); w.set_m_tx_abrt(true); -- cgit v1.2.3