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-rw-r--r--stm32-metapac-gen/src/lib.rs12
1 files changed, 7 insertions, 5 deletions
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs
index abeb6d84..ae401bb6 100644
--- a/stm32-metapac-gen/src/lib.rs
+++ b/stm32-metapac-gen/src/lib.rs
@@ -447,11 +447,13 @@ pub fn gen(options: Options) {
Some(clock) => clock.as_str(),
None => {
// No clock was specified, derive the clock name from the enable register name.
- let re = Regex::new("([A-Z]+\\d*).*").unwrap();
- let caps = re.captures(enable_reg).expect(
- "unable to derive clock name from register name {}",
- );
- caps.get(1).unwrap().as_str()
+ Regex::new("([A-Z]+\\d*).*")
+ .unwrap()
+ .captures(enable_reg)
+ .unwrap()
+ .get(1)
+ .unwrap()
+ .as_str()
}
};