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-rw-r--r--examples/stm32l0/.cargo/config.toml21
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diff --git a/examples/stm32l0/.cargo/config.toml b/examples/stm32l0/.cargo/config.toml
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+[unstable]
+build-std = ["core"]
+
+[target.'cfg(all(target_arch = "arm", target_os = "none"))']
+# replace your chip as listed in `probe-run --list-chips`
+runner = "probe-run --chip STM32L072CZ"
+
+rustflags = [
+ # LLD (shipped with the Rust toolchain) is used as the default linker
+ "-C", "link-arg=--nmagic",
+ "-C", "link-arg=-Tlink.x",
+ "-C", "link-arg=-Tdefmt.x",
+
+ # Code-size optimizations.
+ "-Z", "trap-unreachable=no",
+ "-C", "inline-threshold=5",
+ "-C", "no-vectorize-loops",
+]
+
+[build]
+target = "thumbv6m-none-eabi"