Add stm32-metapac crate, with codegen in rust

4 files changed, 1564 insertions, 0 deletions

diff --git a/stm32-metapac/Cargo.toml b/stm32-metapac/Cargo.toml
new file mode 100644
index 00000000..c32c6690
--- /dev/null
+++ b/stm32-metapac/Cargo.toml
@@ -0,0 +1,1227 @@
+[package]
+name = "stm32-metapac"
+version = "0.1.0"
+edition = "2018"
+links = "stm32-metapac-v0.1"
+
+[dependencies]
+cortex-m = "0.7.2"
+
+[build-dependencies]
+regex = "1.4.6"
+chiptool = { git = "https://github.com/embassy-rs/chiptool", rev = "86b77165078065058098e981d49d2dd213b2feba" }
+serde = { version = "1.0.123", features = [ "derive" ]}
+serde_yaml = "0.8.15"
+cortex-m-rt = { version = "0.6.8", optional = true }
+
+[features]
+rt = ["cortex-m-rt/device"]
+
+
+# BEGIN GENERATED FEATURES
+# Generated by gen_features.py. DO NOT EDIT.
+stm32f030c6 = []
+stm32f030c8 = []
+stm32f030cc = []
+stm32f030f4 = []
+stm32f030k6 = []
+stm32f030r8 = []
+stm32f030rc = []
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+stm32f042t6 = []
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+stm32f048t6 = []
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+stm32f051k4 = []
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+stm32f051k8 = []
+stm32f051r4 = []
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+stm32f091vc = []
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+stm32f100re = []
+stm32f100v8 = []
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+stm32f101rc = []
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+stm32f103vb = []
+stm32f103vc = []
+stm32f103vd = []
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+stm32f103zc = []
+stm32f103zd = []
+stm32f103ze = []
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+stm32f107vc = []
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+stm32f205vb = []
+stm32f205vc = []
+stm32f205ve = []
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+stm32f205vg = []
+stm32f205zc = []
+stm32f205ze = []
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+stm32f303vd = []
+stm32f303ve = []
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+stm32g474vb = []
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+stm32g474ve = []
+stm32g483ce = []
+stm32g483me = []
+stm32g483pe = []
+stm32g483qe = []
+stm32g483re = []
+stm32g483ve = []
+stm32g484ce = []
+stm32g484me = []
+stm32g484pe = []
+stm32g484qe = []
+stm32g484re = []
+stm32g484ve = []
+stm32g491cc = []
+stm32g491ce = []
+stm32g491kc = []
+stm32g491ke = []
+stm32g491mc = []
+stm32g491me = []
+stm32g491rc = []
+stm32g491re = []
+stm32g491vc = []
+stm32g491ve = []
+stm32g4a1ce = []
+stm32g4a1ke = []
+stm32g4a1me = []
+stm32g4a1re = []
+stm32g4a1ve = []
+stm32gbk1cb = []
+stm32h723ve = []
+stm32h723vg = []
+stm32h723ze = []
+stm32h723zg = []
+stm32h725ae = []
+stm32h725ag = []
+stm32h725ie = []
+stm32h725ig = []
+stm32h725re = []
+stm32h725rg = []
+stm32h725ve = []
+stm32h725vg = []
+stm32h725ze = []
+stm32h725zg = []
+stm32h730ab = []
+stm32h730ib = []
+stm32h730vb = []
+stm32h730zb = []
+stm32h733vg = []
+stm32h733zg = []
+stm32h735ag = []
+stm32h735ig = []
+stm32h735rg = []
+stm32h735vg = []
+stm32h735zg = []
+stm32h742ag = []
+stm32h742ai = []
+stm32h742bg = []
+stm32h742bi = []
+stm32h742ig = []
+stm32h742ii = []
+stm32h742vg = []
+stm32h742vi = []
+stm32h742xg = []
+stm32h742xi = []
+stm32h742zg = []
+stm32h742zi = []
+stm32h743ag = []
+stm32h743ai = []
+stm32h743bg = []
+stm32h743bi = []
+stm32h743ig = []
+stm32h743ii = []
+stm32h743vg = []
+stm32h743vi = []
+stm32h743xg = []
+stm32h743xi = []
+stm32h743zg = []
+stm32h743zi = []
+stm32h745bg = []
+stm32h745bi = []
+stm32h745ig = []
+stm32h745ii = []
+stm32h745xg = []
+stm32h745xi = []
+stm32h745zg = []
+stm32h745zi = []
+stm32h747ag = []
+stm32h747ai = []
+stm32h747bg = []
+stm32h747bi = []
+stm32h747ig = []
+stm32h747ii = []
+stm32h747xg = []
+stm32h747xi = []
+stm32h747zi = []
+stm32h750ib = []
+stm32h750vb = []
+stm32h750xb = []
+stm32h750zb = []
+stm32h753ai = []
+stm32h753bi = []
+stm32h753ii = []
+stm32h753vi = []
+stm32h753xi = []
+stm32h753zi = []
+stm32h755bi = []
+stm32h755ii = []
+stm32h755xi = []
+stm32h755zi = []
+stm32h757ai = []
+stm32h757bi = []
+stm32h757ii = []
+stm32h757xi = []
+stm32h757zi = []
+stm32h7a3ag = []
+stm32h7a3ai = []
+stm32h7a3ig = []
+stm32h7a3ii = []
+stm32h7a3lg = []
+stm32h7a3li = []
+stm32h7a3ng = []
+stm32h7a3ni = []
+stm32h7a3qi = []
+stm32h7a3rg = []
+stm32h7a3ri = []
+stm32h7a3vg = []
+stm32h7a3vi = []
+stm32h7a3zg = []
+stm32h7a3zi = []
+stm32h7b0ab = []
+stm32h7b0ib = []
+stm32h7b0rb = []
+stm32h7b0vb = []
+stm32h7b0zb = []
+stm32h7b3ai = []
+stm32h7b3ii = []
+stm32h7b3li = []
+stm32h7b3ni = []
+stm32h7b3qi = []
+stm32h7b3ri = []
+stm32h7b3vi = []
+stm32h7b3zi = []
+stm32l010c6 = []
+stm32l010f4 = []
+stm32l010k4 = []
+stm32l010k8 = []
+stm32l010r8 = []
+stm32l010rb = []
+stm32l011d3 = []
+stm32l011d4 = []
+stm32l011e3 = []
+stm32l011e4 = []
+stm32l011f3 = []
+stm32l011f4 = []
+stm32l011g3 = []
+stm32l011g4 = []
+stm32l011k3 = []
+stm32l011k4 = []
+stm32l021d4 = []
+stm32l021f4 = []
+stm32l021g4 = []
+stm32l021k4 = []
+stm32l031c4 = []
+stm32l031c6 = []
+stm32l031e4 = []
+stm32l031e6 = []
+stm32l031f4 = []
+stm32l031f6 = []
+stm32l031g4 = []
+stm32l031g6 = []
+stm32l031k4 = []
+stm32l031k6 = []
+stm32l041c4 = []
+stm32l041c6 = []
+stm32l041e6 = []
+stm32l041f6 = []
+stm32l041g6 = []
+stm32l041k6 = []
+stm32l051c6 = []
+stm32l051c8 = []
+stm32l051k6 = []
+stm32l051k8 = []
+stm32l051r6 = []
+stm32l051r8 = []
+stm32l051t6 = []
+stm32l051t8 = []
+stm32l052c6 = []
+stm32l052c8 = []
+stm32l052k6 = []
+stm32l052k8 = []
+stm32l052r6 = []
+stm32l052r8 = []
+stm32l052t6 = []
+stm32l052t8 = []
+stm32l053c6 = []
+stm32l053c8 = []
+stm32l053r6 = []
+stm32l053r8 = []
+stm32l062c8 = []
+stm32l062k8 = []
+stm32l063c8 = []
+stm32l063r8 = []
+stm32l071c8 = []
+stm32l071cb = []
+stm32l071cz = []
+stm32l071k8 = []
+stm32l071kb = []
+stm32l071kz = []
+stm32l071rb = []
+stm32l071rz = []
+stm32l071v8 = []
+stm32l071vb = []
+stm32l071vz = []
+stm32l072cb = []
+stm32l072cz = []
+stm32l072kb = []
+stm32l072kz = []
+stm32l072rb = []
+stm32l072rz = []
+stm32l072v8 = []
+stm32l072vb = []
+stm32l072vz = []
+stm32l073cb = []
+stm32l073cz = []
+stm32l073rb = []
+stm32l073rz = []
+stm32l073v8 = []
+stm32l073vb = []
+stm32l073vz = []
+stm32l081cb = []
+stm32l081cz = []
+stm32l081kz = []
+stm32l082cz = []
+stm32l082kb = []
+stm32l082kz = []
+stm32l083cb = []
+stm32l083cz = []
+stm32l083rb = []
+stm32l083rz = []
+stm32l083v8 = []
+stm32l083vb = []
+stm32l083vz = []
+stm32l100c6-a = []
+stm32l100c6 = []
+stm32l100r8-a = []
+stm32l100r8 = []
+stm32l100rb-a = []
+stm32l100rb = []
+stm32l100rc = []
+stm32l151c6-a = []
+stm32l151c6 = []
+stm32l151c8-a = []
+stm32l151c8 = []
+stm32l151cb-a = []
+stm32l151cb = []
+stm32l151cc = []
+stm32l151qc = []
+stm32l151qd = []
+stm32l151qe = []
+stm32l151r6-a = []
+stm32l151r6 = []
+stm32l151r8-a = []
+stm32l151r8 = []
+stm32l151rb-a = []
+stm32l151rb = []
+stm32l151rc-a = []
+stm32l151rc = []
+stm32l151rd = []
+stm32l151re = []
+stm32l151uc = []
+stm32l151v8-a = []
+stm32l151v8 = []
+stm32l151vb-a = []
+stm32l151vb = []
+stm32l151vc-a = []
+stm32l151vc = []
+stm32l151vd-x = []
+stm32l151vd = []
+stm32l151ve = []
+stm32l151zc = []
+stm32l151zd = []
+stm32l151ze = []
+stm32l152c6-a = []
+stm32l152c6 = []
+stm32l152c8-a = []
+stm32l152c8 = []
+stm32l152cb-a = []
+stm32l152cb = []
+stm32l152cc = []
+stm32l152qc = []
+stm32l152qd = []
+stm32l152qe = []
+stm32l152r6-a = []
+stm32l152r6 = []
+stm32l152r8-a = []
+stm32l152r8 = []
+stm32l152rb-a = []
+stm32l152rb = []
+stm32l152rc-a = []
+stm32l152rc = []
+stm32l152rd = []
+stm32l152re = []
+stm32l152uc = []
+stm32l152v8-a = []
+stm32l152v8 = []
+stm32l152vb-a = []
+stm32l152vb = []
+stm32l152vc-a = []
+stm32l152vc = []
+stm32l152vd-x = []
+stm32l152vd = []
+stm32l152ve = []
+stm32l152zc = []
+stm32l152zd = []
+stm32l152ze = []
+stm32l162qc = []
+stm32l162qd = []
+stm32l162rc-a = []
+stm32l162rc = []
+stm32l162rd = []
+stm32l162re = []
+stm32l162vc-a = []
+stm32l162vc = []
+stm32l162vd-x = []
+stm32l162vd = []
+stm32l162ve = []
+stm32l162zc = []
+stm32l162zd = []
+stm32l162ze = []
+stm32l412c8 = []
+stm32l412cb = []
+stm32l412k8 = []
+stm32l412kb = []
+stm32l412r8 = []
+stm32l412rb = []
+stm32l412t8 = []
+stm32l412tb = []
+stm32l422cb = []
+stm32l422kb = []
+stm32l422rb = []
+stm32l422tb = []
+stm32l431cb = []
+stm32l431cc = []
+stm32l431kb = []
+stm32l431kc = []
+stm32l431rb = []
+stm32l431rc = []
+stm32l431vc = []
+stm32l432kb = []
+stm32l432kc = []
+stm32l433cb = []
+stm32l433cc = []
+stm32l433rb = []
+stm32l433rc = []
+stm32l433vc = []
+stm32l442kc = []
+stm32l443cc = []
+stm32l443rc = []
+stm32l443vc = []
+stm32l451cc = []
+stm32l451ce = []
+stm32l451rc = []
+stm32l451re = []
+stm32l451vc = []
+stm32l451ve = []
+stm32l452cc = []
+stm32l452ce = []
+stm32l452rc = []
+stm32l452re = []
+stm32l452vc = []
+stm32l452ve = []
+stm32l462ce = []
+stm32l462re = []
+stm32l462ve = []
+stm32l471qe = []
+stm32l471qg = []
+stm32l471re = []
+stm32l471rg = []
+stm32l471ve = []
+stm32l471vg = []
+stm32l471ze = []
+stm32l471zg = []
+stm32l475rc = []
+stm32l475re = []
+stm32l475rg = []
+stm32l475vc = []
+stm32l475ve = []
+stm32l475vg = []
+stm32l476je = []
+stm32l476jg = []
+stm32l476me = []
+stm32l476mg = []
+stm32l476qe = []
+stm32l476qg = []
+stm32l476rc = []
+stm32l476re = []
+stm32l476rg = []
+stm32l476vc = []
+stm32l476ve = []
+stm32l476vg = []
+stm32l476ze = []
+stm32l476zg = []
+stm32l485jc = []
+stm32l485je = []
+stm32l486jg = []
+stm32l486qg = []
+stm32l486rg = []
+stm32l486vg = []
+stm32l486zg = []
+stm32l496ae = []
+stm32l496ag = []
+stm32l496qe = []
+stm32l496qg = []
+stm32l496re = []
+stm32l496rg = []
+stm32l496ve = []
+stm32l496vg = []
+stm32l496wg = []
+stm32l496ze = []
+stm32l496zg = []
+stm32l4a6ag = []
+stm32l4a6qg = []
+stm32l4a6rg = []
+stm32l4a6vg = []
+stm32l4a6zg = []
+stm32l4p5ae = []
+stm32l4p5ag = []
+stm32l4p5ce = []
+stm32l4p5cg = []
+stm32l4p5qe = []
+stm32l4p5qg = []
+stm32l4p5re = []
+stm32l4p5rg = []
+stm32l4p5ve = []
+stm32l4p5vg = []
+stm32l4p5ze = []
+stm32l4p5zg = []
+stm32l4q5ag = []
+stm32l4q5cg = []
+stm32l4q5qg = []
+stm32l4q5rg = []
+stm32l4q5vg = []
+stm32l4q5zg = []
+stm32l4r5ag = []
+stm32l4r5ai = []
+stm32l4r5qg = []
+stm32l4r5qi = []
+stm32l4r5vg = []
+stm32l4r5vi = []
+stm32l4r5zg = []
+stm32l4r5zi = []
+stm32l4r7ai = []
+stm32l4r7vi = []
+stm32l4r7zi = []
+stm32l4r9ag = []
+stm32l4r9ai = []
+stm32l4r9vg = []
+stm32l4r9vi = []
+stm32l4r9zg = []
+stm32l4r9zi = []
+stm32l4s5ai = []
+stm32l4s5qi = []
+stm32l4s5vi = []
+stm32l4s5zi = []
+stm32l4s7ai = []
+stm32l4s7vi = []
+stm32l4s7zi = []
+stm32l4s9ai = []
+stm32l4s9vi = []
+stm32l4s9zi = []
+stm32l552cc = []
+stm32l552ce = []
+stm32l552me = []
+stm32l552qc = []
+stm32l552qe = []
+stm32l552rc = []
+stm32l552re = []
+stm32l552vc = []
+stm32l552ve = []
+stm32l552zc = []
+stm32l552ze = []
+stm32l562ce = []
+stm32l562me = []
+stm32l562qe = []
+stm32l562re = []
+stm32l562ve = []
+stm32l562ze = []
+stm32wb10cc = []
+stm32wb15cc = []
+stm32wb30ce = []
+stm32wb35cc = []
+stm32wb35ce = []
+stm32wb50cg = []
+stm32wb55cc = []
+stm32wb55ce = []
+stm32wb55cg = []
+stm32wb55rc = []
+stm32wb55re = []
+stm32wb55rg = []
+stm32wb55vc = []
+stm32wb55ve = []
+stm32wb55vg = []
+stm32wb55vy = []
+stm32wb5mmg = []
+stm32wl54cc = []
+stm32wl54jc = []
+stm32wl55cc = []
+stm32wl55jc = []
+stm32wl55uc = []
+stm32wle4c8 = []
+stm32wle4cb = []
+stm32wle4cc = []
+stm32wle4j8 = []
+stm32wle4jb = []
+stm32wle4jc = []
+stm32wle5c8 = []
+stm32wle5cb = []
+stm32wle5cc = []
+stm32wle5j8 = []
+stm32wle5jb = []
+stm32wle5jc = []
+stm32wle5u8 = []
+stm32wle5ub = []
+# END GENERATED FEATURES
diff --git a/stm32-metapac/build.rs b/stm32-metapac/build.rs
new file mode 100644
index 00000000..ffea82d5
--- /dev/null
+++ b/stm32-metapac/build.rs
@@ -0,0 +1,294 @@
+use regex::Regex;
+use serde::Deserialize;
+use std::collections::{HashMap, HashSet};
+use std::env;
+use std::fmt::Write as _;
+use std::fs;
+use std::fs::File;
+use std::io::Write;
+use std::path::Path;
+use std::path::PathBuf;
+
+use chiptool::{generate, ir, transform};
+
+#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
+pub struct Chip {
+    pub name: String,
+    pub family: String,
+    pub line: String,
+    pub core: String,
+    pub flash: u32,
+    pub ram: u32,
+    pub gpio_af: String,
+    pub packages: Vec<Package>,
+    pub peripherals: HashMap<String, Peripheral>,
+    pub interrupts: HashMap<String, u32>,
+}
+
+#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
+pub struct Package {
+    pub name: String,
+    pub package: String,
+}
+
+#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
+pub struct Peripheral {
+    pub address: u32,
+    #[serde(default)]
+    pub kind: Option<String>,
+    #[serde(default)]
+    pub block: Option<String>,
+    #[serde(default)]
+    pub clock: Option<String>,
+}
+
+struct BlockInfo {
+    module: String,  // usart_v1/USART -> usart
+    version: String, // usart_v1/USART -> v1
+    block: String,   // usart_v1/USART -> USART
+}
+
+impl BlockInfo {
+    fn parse(s: &str) -> Self {
+        let mut s = s.split("/");
+        let module = s.next().unwrap();
+        let block = s.next().unwrap();
+        assert!(s.next().is_none());
+        let mut s = module.split("_");
+        let module = s.next().unwrap();
+        let version = s.next().unwrap();
+        assert!(s.next().is_none());
+        Self {
+            module: module.to_string(),
+            version: version.to_string(),
+            block: block.to_string(),
+        }
+    }
+}
+
+fn make_table(out: &mut String, name: &str, data: &Vec<Vec<String>>) {
+    write!(
+        out,
+        "#[macro_export]
+macro_rules! {} {{
+    ($($pat:tt => $code:tt;)*) => {{
+        macro_rules! __{}_inner {{
+            $(($pat) => $code;)*
+            ($_:tt) => {{}}
+        }}
+",
+        name, name
+    )
+    .unwrap();
+
+    for row in data {
+        write!(out, "        __{}_inner!(({}));\n", name, row.join(",")).unwrap();
+    }
+
+    write!(
+        out,
+        "    }};
+}}"
+    )
+    .unwrap();
+}
+
+fn main() {
+    let dir = "../stm32-data/data";
+
+    println!("cwd: {:?}", env::current_dir());
+
+    let chip_name = env::vars_os()
+        .map(|(a, _)| a.to_string_lossy().to_string())
+        .find(|x| x.starts_with("CARGO_FEATURE_STM32"))
+        .expect("No stm32xx Cargo feature enabled")
+        .strip_prefix("CARGO_FEATURE_")
+        .unwrap()
+        .to_ascii_uppercase();
+
+    let chip_path = Path::new(&dir)
+        .join("chips")
+        .join(&format!("{}.yaml", chip_name));
+    let chip = fs::read(chip_path).unwrap();
+    let chip: Chip = serde_yaml::from_slice(&chip).unwrap();
+
+    let mut ir = ir::IR::new();
+
+    let mut dev = ir::Device {
+        interrupts: Vec::new(),
+        peripherals: Vec::new(),
+    };
+
+    let mut peripheral_versions: HashMap<String, String> = HashMap::new();
+    let mut cfgs: HashSet<String> = HashSet::new();
+    let mut pin_table: Vec<Vec<String>> = Vec::new();
+    let mut interrupt_table: Vec<Vec<String>> = Vec::new();
+
+    let dma_base = chip
+        .peripherals
+        .get(&"DMA".to_string())
+        .unwrap_or_else(|| chip.peripherals.get(&"DMA1".to_string()).unwrap())
+        .address;
+    let dma_stride = 0x400;
+
+    let gpio_base = chip.peripherals.get(&"GPIOA".to_string()).unwrap().address;
+    let gpio_stride = 0x400;
+
+    cfgs.insert(chip.family.to_ascii_lowercase());
+
+    for (name, p) in &chip.peripherals {
+        let mut ir_peri = ir::Peripheral {
+            name: name.clone(),
+            array: None,
+            base_address: p.address,
+            block: None,
+            description: None,
+            interrupts: HashMap::new(),
+        };
+
+        if let Some(block) = &p.block {
+            let bi = BlockInfo::parse(block);
+
+            cfgs.insert(bi.module.clone());
+            cfgs.insert(format!("{}_{}", bi.module, bi.version));
+
+            if let Some(old_version) =
+                peripheral_versions.insert(bi.module.clone(), bi.version.clone())
+            {
+                if old_version != bi.version {
+                    panic!(
+                        "Peripheral {} has multiple versions: {} and {}",
+                        bi.module, old_version, bi.version
+                    );
+                }
+            }
+            ir_peri.block = Some(format!("{}::{}", bi.module, bi.block));
+
+            match bi.module.as_str() {
+                "gpio" => {
+                    let port_letter = name.chars().skip(4).next().unwrap();
+                    let port_num = port_letter as u32 - 'A' as u32;
+                    assert_eq!(p.address, gpio_base + gpio_stride * port_num);
+
+                    for pin_num in 0..16 {
+                        let pin_name = format!("P{}{}", port_letter, pin_num);
+                        pin_table.push(vec![
+                            pin_name.clone(),
+                            name.clone(),
+                            port_num.to_string(),
+                            pin_num.to_string(),
+                            format!("EXTI{}", pin_num),
+                        ]);
+                    }
+                }
+                "dma" => {
+                    let dma_num = if name == "DMA" {
+                        0
+                    } else {
+                        let dma_letter = name.chars().skip(3).next().unwrap();
+                        dma_letter as u32 - '1' as u32
+                    };
+                    assert_eq!(p.address, dma_base + dma_stride * dma_num);
+                }
+                _ => {}
+            }
+        }
+
+        dev.peripherals.push(ir_peri);
+    }
+
+    for (name, &num) in &chip.interrupts {
+        dev.interrupts.push(ir::Interrupt {
+            name: name.clone(),
+            description: None,
+            value: num,
+        });
+
+        interrupt_table.push(vec![name.to_ascii_uppercase()]);
+    }
+
+    ir.devices.insert("".to_string(), dev);
+
+    let mut extra = format!(
+        "pub fn GPIO(n: usize) -> gpio::Gpio {{
+            gpio::Gpio(({} + {}*n) as _)
+        }}
+        pub fn DMA(n: usize) -> dma::Dma {{
+            dma::Dma(({} + {}*n) as _)
+        }}",
+        gpio_base, gpio_stride, dma_base, dma_stride,
+    );
+
+    let peripheral_version_table = peripheral_versions
+        .iter()
+        .map(|(kind, version)| vec![kind.clone(), version.clone()])
+        .collect();
+
+    make_table(&mut extra, "pins", &pin_table);
+    make_table(&mut extra, "interrupts", &interrupt_table);
+    make_table(&mut extra, "peripheral_versions", &peripheral_version_table);
+
+    for (module, version) in peripheral_versions {
+        println!("loading {} {}", module, version);
+
+        let regs_path = Path::new(&dir)
+            .join("registers")
+            .join(&format!("{}_{}.yaml", module, version));
+
+        let mut peri: ir::IR = serde_yaml::from_reader(File::open(regs_path).unwrap()).unwrap();
+
+        transform::expand_extends::ExpandExtends {}
+            .run(&mut peri)
+            .unwrap();
+
+        let prefix = module;
+        transform::map_names(&mut peri, |s, k| match k {
+            transform::NameKind::Block => format!("{}::{}", prefix, s),
+            transform::NameKind::Fieldset => format!("{}::regs::{}", prefix, s),
+            transform::NameKind::Enum => format!("{}::vals::{}", prefix, s),
+            _ => s.to_string(),
+        })
+        .unwrap();
+
+        ir.merge(peri);
+    }
+
+    // Cleanups!
+    transform::sort::Sort {}.run(&mut ir).unwrap();
+    transform::Sanitize {}.run(&mut ir).unwrap();
+
+    let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+
+    let items = generate::render(&ir).unwrap();
+    let mut file = File::create(out.join("pac.rs")).unwrap();
+    let data = items.to_string().replace("] ", "]\n");
+
+    // Remove inner attributes like #![no_std]
+    let re = Regex::new("# *! *\\[.*\\]").unwrap();
+    let data = re.replace_all(&data, "");
+    file.write_all(data.as_bytes()).unwrap();
+    file.write_all(extra.as_bytes()).unwrap();
+
+    let mut device_x = String::new();
+
+    for (name, _) in &chip.interrupts {
+        write!(
+            &mut device_x,
+            "PROVIDE({} = DefaultHandler);\n",
+            name.to_ascii_uppercase()
+        )
+        .unwrap();
+    }
+
+    File::create(out.join("device.x"))
+        .unwrap()
+        .write_all(device_x.as_bytes())
+        .unwrap();
+    println!("cargo:rustc-link-search={}", out.display());
+    println!("cargo:rerun-if-changed=build.rs");
+
+    println!(
+        "cargo:cfgs={}",
+        cfgs.into_iter().collect::<Vec<_>>().join(",")
+    );
+}
diff --git a/stm32-metapac/gen_features.py b/stm32-metapac/gen_features.py
new file mode 100644
index 00000000..ee92bd76
--- /dev/null
+++ b/stm32-metapac/gen_features.py
@@ -0,0 +1,37 @@
+import xmltodict
+import yaml
+import re
+import json
+import os
+import re
+import toml
+from collections import OrderedDict
+from glob import glob
+
+abspath = os.path.abspath(__file__)
+dname = os.path.dirname(abspath)
+os.chdir(dname)
+
+# ======= load chip list
+
+features = {}
+
+for f in sorted(glob('../stm32-data/data/chips/*.yaml')):
+    # Use the filename to get the chip name. Ultra fast, we don't have to read YAML!
+    name = os.path.splitext(os.path.basename(f))[0].lower()
+    features[name] = []
+
+
+# ========= Update Cargo features
+
+SEPARATOR_START = '# BEGIN GENERATED FEATURES\n'
+SEPARATOR_END = '# END GENERATED FEATURES\n'
+HELP = '# Generated by gen_features.py. DO NOT EDIT.\n'
+with open('Cargo.toml', 'r') as f:
+    cargo = f.read()
+before, cargo = cargo.split(SEPARATOR_START, maxsplit=1)
+_, after = cargo.split(SEPARATOR_END, maxsplit=1)
+cargo = before + SEPARATOR_START + HELP + \
+    toml.dumps(features) + SEPARATOR_END + after
+with open('Cargo.toml', 'w') as f:
+    f.write(cargo)
diff --git a/stm32-metapac/src/lib.rs b/stm32-metapac/src/lib.rs
new file mode 100644
index 00000000..cf8ff378
--- /dev/null
+++ b/stm32-metapac/src/lib.rs
@@ -0,0 +1,6 @@
+#![no_std]
+#![allow(non_snake_case)]
+#![allow(unused)]
+#![allow(non_camel_case_types)]
+
+include!(concat!(env!("OUT_DIR"), "/pac.rs"));