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| author | Bob McWhirter <bmcwhirt@redhat.com> | 2021-07-12 14:11:18 -0400 |
|---|---|---|
| committer | Bob McWhirter <bmcwhirt@redhat.com> | 2021-07-13 10:09:35 -0400 |
| commit | 06e899b14cba8e1071adbe9e17dec0542f677853 (patch) | |
| tree | 96d09ee6c1ca25723c5333cbe8e7e61960a679b4 /stm32-metapac-gen | |
| parent | d31e30f382671fecae393f848f576ab45208bdf9 (diff) | |
| download | embassy-06e899b14cba8e1071adbe9e17dec0542f677853.zip | |
Adjust to DMA1EN in the rcc for l0.
Diffstat (limited to 'stm32-metapac-gen')
| -rw-r--r-- | stm32-metapac-gen/src/lib.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs index 570a225c..640d746e 100644 --- a/stm32-metapac-gen/src/lib.rs +++ b/stm32-metapac-gen/src/lib.rs @@ -390,8 +390,8 @@ pub fn gen(options: Options) { if let Some(clock_prefix) = clock_prefix { // Workaround for clock registers being split on some chip families. Assume fields are // named after peripheral and look for first field matching and use that register. - let mut en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); - let mut rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); + let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); + let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); match (en, rst) { (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => { |