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| author | Ulf Lilleengen <ulf.lilleengen@gmail.com> | 2022-02-09 12:46:46 +0100 |
|---|---|---|
| committer | Ulf Lilleengen <ulf.lilleengen@gmail.com> | 2022-02-09 12:46:46 +0100 |
| commit | e990021b9a9d3acc309c21bd4ddf3ff090bb7999 (patch) | |
| tree | 5e457a46c63f9565e82b9dd401701cbd7aba20b7 /embassy-boot | |
| parent | ed2a87a262e0e8c091627c96ced981dd3a97a6a1 (diff) | |
| download | embassy-e990021b9a9d3acc309c21bd4ddf3ff090bb7999.zip | |
Address review comments
Diffstat (limited to 'embassy-boot')
| -rw-r--r-- | embassy-boot/nrf/src/lib.rs | 7 | ||||
| -rw-r--r-- | embassy-boot/nrf/src/main.rs | 5 |
2 files changed, 11 insertions, 1 deletions
diff --git a/embassy-boot/nrf/src/lib.rs b/embassy-boot/nrf/src/lib.rs index af7ec7da..32250b2d 100644 --- a/embassy-boot/nrf/src/lib.rs +++ b/embassy-boot/nrf/src/lib.rs @@ -100,6 +100,13 @@ impl BootLoader { trace!("msp = {=u32:x}, rv = {=u32:x}", msp, rv); + // These instructions perform the following operations: + // + // * Modify control register to use MSP as stack pointer (clear spsel bit) + // * Synchronize instruction barrier + // * Initialize stack pointer (0x1000) + // * Set link register to not return (0xFF) + // * Jump to softdevice reset vector core::arch::asm!( "mrs {tmp}, CONTROL", "bics {tmp}, {spsel}", diff --git a/embassy-boot/nrf/src/main.rs b/embassy-boot/nrf/src/main.rs index 08b854a7..cd264d4c 100644 --- a/embassy-boot/nrf/src/main.rs +++ b/embassy-boot/nrf/src/main.rs @@ -12,6 +12,9 @@ use embassy_nrf::nvmc::Nvmc; #[entry] fn main() -> ! { let p = embassy_nrf::init(Default::default()); + + // Uncomment this if you are debugging the bootloader with debugger/RTT attached, + // as it prevents a hard fault when accessing flash 'too early' after boot. /* for i in 0..10000000 { cortex_m::asm::nop(); @@ -40,7 +43,7 @@ unsafe fn DefaultHandler(_: i16) -> ! { #[panic_handler] fn panic(_info: &core::panic::PanicInfo) -> ! { unsafe { - core::arch::asm!("udf #0"); + cortex_m::asm::udf(); core::hint::unreachable_unchecked(); } } |