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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-06-15 13:29:55 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-06-15 13:29:55 +0000 |
| commit | 03c20604c39d622b28c0070e5a95b9fbfb7a8f8a (patch) | |
| tree | 38ede12e48b39ec59d06c9ec5331d5b2c483dacc | |
| parent | 624e46ccfb325c5e5ef15b34c7182cafdb62a7a2 (diff) | |
| parent | faa59efbf623b4551e064a61c087294f73dbb123 (diff) | |
| download | embassy-03c20604c39d622b28c0070e5a95b9fbfb7a8f8a.zip | |
Merge #811
811: Sync subghz peripheral support with stm32wlxx-hal r=lulf a=lulf
* A few more registers exposed
* Fix for "sleeping"
* Updating comments
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
24 files changed, 371 insertions, 967 deletions
diff --git a/embassy-stm32/src/subghz/bit_sync.rs b/embassy-stm32/src/subghz/bit_sync.rs index 86b6c48f..f3cba05f 100644 --- a/embassy-stm32/src/subghz/bit_sync.rs +++ b/embassy-stm32/src/subghz/bit_sync.rs @@ -33,7 +33,7 @@ impl BitSync { /// Enable simple bit synchronization. /// /// ``` - /// use stm32wl_hal::subghz::BitSync; + /// use stm32wlxx_hal::subghz::BitSync; /// /// const BIT_SYNC: BitSync = BitSync::RESET.set_simple_bit_sync_en(true); /// # assert_eq!(u8::from(BIT_SYNC), 0x40u8); @@ -53,7 +53,7 @@ impl BitSync { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::BitSync; + /// use stm32wlxx_hal::subghz::BitSync; /// /// let bs: BitSync = BitSync::RESET; /// assert_eq!(bs.simple_bit_sync_en(), false); @@ -73,7 +73,7 @@ impl BitSync { /// Invert receive data. /// /// ``` - /// use stm32wl_hal::subghz::BitSync; + /// use stm32wlxx_hal::subghz::BitSync; /// /// const BIT_SYNC: BitSync = BitSync::RESET.set_rx_data_inv(true); /// # assert_eq!(u8::from(BIT_SYNC), 0x20u8); @@ -93,7 +93,7 @@ impl BitSync { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::BitSync; + /// use stm32wlxx_hal::subghz::BitSync; /// /// let bs: BitSync = BitSync::RESET; /// assert_eq!(bs.rx_data_inv(), false); @@ -113,7 +113,7 @@ impl BitSync { /// Enable normal bit synchronization. /// /// ``` - /// use stm32wl_hal::subghz::BitSync; + /// use stm32wlxx_hal::subghz::BitSync; /// /// const BIT_SYNC: BitSync = BitSync::RESET.set_norm_bit_sync_en(true); /// # assert_eq!(u8::from(BIT_SYNC), 0x10u8); @@ -133,7 +133,7 @@ impl BitSync { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::BitSync; + /// use stm32wlxx_hal::subghz::BitSync; /// /// let bs: BitSync = BitSync::RESET; /// assert_eq!(bs.norm_bit_sync_en(), false); diff --git a/embassy-stm32/src/subghz/cad_params.rs b/embassy-stm32/src/subghz/cad_params.rs index bbfe62c2..1d90ff70 100644 --- a/embassy-stm32/src/subghz/cad_params.rs +++ b/embassy-stm32/src/subghz/cad_params.rs @@ -75,7 +75,7 @@ impl CadParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::CadParams; + /// use stm32wlxx_hal::subghz::CadParams; /// /// const CAD_PARAMS: CadParams = CadParams::new(); /// assert_eq!(CAD_PARAMS, CadParams::default()); @@ -97,7 +97,7 @@ impl CadParams { /// Set the number of symbols to 4. /// /// ``` - /// use stm32wl_hal::subghz::{CadParams, NbCadSymbol}; + /// use stm32wlxx_hal::subghz::{CadParams, NbCadSymbol}; /// /// const CAD_PARAMS: CadParams = CadParams::new().set_num_symbol(NbCadSymbol::S4); /// # assert_eq!(CAD_PARAMS.as_slice()[1], 0x2); @@ -117,7 +117,7 @@ impl CadParams { /// Setting the recommended value for a spreading factor of 7. /// /// ``` - /// use stm32wl_hal::subghz::CadParams; + /// use stm32wlxx_hal::subghz::CadParams; /// /// const CAD_PARAMS: CadParams = CadParams::new().set_det_peak(0x20).set_det_min(0x10); /// # assert_eq!(CAD_PARAMS.as_slice()[2], 0x20); @@ -140,7 +140,7 @@ impl CadParams { /// Setting the recommended value for a spreading factor of 6. /// /// ``` - /// use stm32wl_hal::subghz::CadParams; + /// use stm32wlxx_hal::subghz::CadParams; /// /// const CAD_PARAMS: CadParams = CadParams::new().set_det_peak(0x18).set_det_min(0x10); /// # assert_eq!(CAD_PARAMS.as_slice()[2], 0x18); @@ -159,7 +159,7 @@ impl CadParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CadParams, ExitMode}; + /// use stm32wlxx_hal::subghz::{CadParams, ExitMode}; /// /// const CAD_PARAMS: CadParams = CadParams::new().set_exit_mode(ExitMode::Standby); /// # assert_eq!(CAD_PARAMS.as_slice()[4], 0x00); @@ -178,7 +178,7 @@ impl CadParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CadParams, ExitMode, Timeout}; + /// use stm32wlxx_hal::subghz::{CadParams, ExitMode, Timeout}; /// /// const TIMEOUT: Timeout = Timeout::from_raw(0x123456); /// const CAD_PARAMS: CadParams = CadParams::new() @@ -203,7 +203,7 @@ impl CadParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CadParams, ExitMode, NbCadSymbol, Timeout}; + /// use stm32wlxx_hal::subghz::{CadParams, ExitMode, NbCadSymbol, Timeout}; /// /// const TIMEOUT: Timeout = Timeout::from_raw(0x123456); /// const CAD_PARAMS: CadParams = CadParams::new() diff --git a/embassy-stm32/src/subghz/calibrate.rs b/embassy-stm32/src/subghz/calibrate.rs index dc8c8069..f94538f8 100644 --- a/embassy-stm32/src/subghz/calibrate.rs +++ b/embassy-stm32/src/subghz/calibrate.rs @@ -28,7 +28,7 @@ impl CalibrateImage { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::CalibrateImage; + /// use stm32wlxx_hal::subghz::CalibrateImage; /// /// const CAL: CalibrateImage = CalibrateImage::new(0xE1, 0xE9); /// assert_eq!(CAL, CalibrateImage::ISM_902_928); @@ -54,7 +54,7 @@ impl CalibrateImage { /// Create an image calibration for the 430 - 440 MHz ISM band. /// /// ``` - /// use stm32wl_hal::subghz::CalibrateImage; + /// use stm32wlxx_hal::subghz::CalibrateImage; /// /// let cal: CalibrateImage = CalibrateImage::from_freq(428, 444); /// assert_eq!(cal, CalibrateImage::ISM_430_440); @@ -106,7 +106,7 @@ impl Calibrate { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Calibrate; + /// use stm32wlxx_hal::subghz::Calibrate; /// /// assert_eq!(Calibrate::Image.mask(), 0b0100_0000); /// assert_eq!(Calibrate::AdcBulkP.mask(), 0b0010_0000); diff --git a/embassy-stm32/src/subghz/fallback_mode.rs b/embassy-stm32/src/subghz/fallback_mode.rs index bc7204da..50ec592f 100644 --- a/embassy-stm32/src/subghz/fallback_mode.rs +++ b/embassy-stm32/src/subghz/fallback_mode.rs @@ -27,7 +27,7 @@ impl Default for FallbackMode { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FallbackMode; + /// use stm32wlxx_hal::subghz::FallbackMode; /// /// assert_eq!(FallbackMode::default(), FallbackMode::Standby); /// ``` diff --git a/embassy-stm32/src/subghz/hse_trim.rs b/embassy-stm32/src/subghz/hse_trim.rs index 8ead7385..edfd52ac 100644 --- a/embassy-stm32/src/subghz/hse_trim.rs +++ b/embassy-stm32/src/subghz/hse_trim.rs @@ -26,7 +26,7 @@ impl HseTrim { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::HseTrim; + /// use stm32wlxx_hal::subghz::HseTrim; /// /// assert_eq!(HseTrim::POR, HseTrim::default()); /// ``` @@ -39,7 +39,7 @@ impl HseTrim { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::HseTrim; + /// use stm32wlxx_hal::subghz::HseTrim; /// /// assert_eq!(HseTrim::from_raw(0xFF), HseTrim::MAX); /// assert_eq!(HseTrim::from_raw(0x2F), HseTrim::MAX); @@ -61,7 +61,7 @@ impl HseTrim { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::HseTrim; + /// use stm32wlxx_hal::subghz::HseTrim; /// /// assert!(HseTrim::from_farads(1.0).is_err()); /// assert!(HseTrim::from_farads(1e-12).is_err()); @@ -84,7 +84,7 @@ impl HseTrim { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::HseTrim; + /// use stm32wlxx_hal::subghz::HseTrim; /// /// assert_eq!((HseTrim::MAX.as_farads() * 10e11) as u8, 33); /// assert_eq!((HseTrim::MIN.as_farads() * 10e11) as u8, 11); diff --git a/embassy-stm32/src/subghz/irq.rs b/embassy-stm32/src/subghz/irq.rs index b113095a..b56b8ad9 100644 --- a/embassy-stm32/src/subghz/irq.rs +++ b/embassy-stm32/src/subghz/irq.rs @@ -99,7 +99,7 @@ impl Irq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Irq; + /// use stm32wlxx_hal::subghz::Irq; /// /// assert_eq!(Irq::TxDone.mask(), 0x0001); /// assert_eq!(Irq::Timeout.mask(), 0x0200); @@ -128,7 +128,7 @@ impl CfgIrq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::CfgIrq; + /// use stm32wlxx_hal::subghz::CfgIrq; /// /// const IRQ_CFG: CfgIrq = CfgIrq::new(); /// ``` @@ -153,7 +153,7 @@ impl CfgIrq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CfgIrq, Irq, IrqLine}; + /// use stm32wlxx_hal::subghz::{CfgIrq, Irq, IrqLine}; /// /// const IRQ_CFG: CfgIrq = CfgIrq::new() /// .irq_enable(IrqLine::Global, Irq::TxDone) @@ -179,7 +179,7 @@ impl CfgIrq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CfgIrq, Irq}; + /// use stm32wlxx_hal::subghz::{CfgIrq, Irq}; /// /// const IRQ_CFG: CfgIrq = CfgIrq::new() /// .irq_enable_all(Irq::TxDone) @@ -214,7 +214,7 @@ impl CfgIrq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CfgIrq, Irq, IrqLine}; + /// use stm32wlxx_hal::subghz::{CfgIrq, Irq, IrqLine}; /// /// const IRQ_CFG: CfgIrq = CfgIrq::new() /// .irq_enable(IrqLine::Global, Irq::TxDone) @@ -239,7 +239,7 @@ impl CfgIrq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CfgIrq, Irq}; + /// use stm32wlxx_hal::subghz::{CfgIrq, Irq}; /// /// const IRQ_CFG: CfgIrq = CfgIrq::new() /// .irq_enable_all(Irq::TxDone) @@ -269,7 +269,7 @@ impl CfgIrq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CfgIrq, Irq}; + /// use stm32wlxx_hal::subghz::{CfgIrq, Irq}; /// /// const IRQ_CFG: CfgIrq = CfgIrq::new() /// .irq_enable_all(Irq::TxDone) diff --git a/embassy-stm32/src/subghz/mod.rs b/embassy-stm32/src/subghz/mod.rs index 3b64932f..ce513ec6 100644 --- a/embassy-stm32/src/subghz/mod.rs +++ b/embassy-stm32/src/subghz/mod.rs @@ -1,5 +1,7 @@ //! Sub-GHz radio operating in the 150 - 960 MHz ISM band //! +//! The main radio type is [`SubGhz`]. +//! //! ## LoRa user notice //! //! The Sub-GHz radio may have an undocumented erratum, see this ST community @@ -91,6 +93,7 @@ struct Nss { } impl Nss { + #[inline(always)] pub fn new() -> Nss { Self::clear(); Nss { _priv: () } @@ -359,137 +362,68 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { } /// Set the initial value for generic packet CRC polynomial. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// sg.set_crc_polynomial(0x1D0F)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> { let bytes: [u8; 2] = polynomial.to_be_bytes(); self.write(wr_reg![GCRCINIRH, bytes[0], bytes[1]]) } /// Set the generic packet CRC polynomial. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// sg.set_initial_crc_polynomial(0x1021)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_initial_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> { let bytes: [u8; 2] = polynomial.to_be_bytes(); self.write(wr_reg![GCRCPOLRH, bytes[0], bytes[1]]) } /// Set the synchronization word registers. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// const SYNC_WORD: [u8; 8] = [0x79, 0x80, 0x0C, 0xC0, 0x29, 0x95, 0xF8, 0x4A]; - /// - /// sg.set_sync_word(&SYNC_WORD)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_sync_word(&mut self, sync_word: &[u8; 8]) -> Result<(), Error> { self.write_register(Register::GSYNC7, sync_word) } /// Set the LoRa synchronization word registers. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{LoRaSyncWord, PacketType}; - /// - /// sg.set_packet_type(PacketType::LoRa)?; - /// sg.set_lora_sync_word(LoRaSyncWord::Public)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_lora_sync_word(&mut self, sync_word: LoRaSyncWord) -> Result<(), Error> { let bytes: [u8; 2] = sync_word.bytes(); self.write(wr_reg![LSYNCH, bytes[0], bytes[1]]) } /// Set the RX gain control. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::PMode; - /// - /// sg.set_rx_gain(PMode::Boost)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_rx_gain(&mut self, pmode: PMode) -> Result<(), Error> { self.write(wr_reg![RXGAINC, pmode as u8]) } /// Set the power amplifier over current protection. - /// - /// # Example - /// - /// Maximum 60mA for LP PA mode. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::Ocp; - /// - /// sg.set_pa_ocp(Ocp::Max60m)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// Maximum 60mA for HP PA mode. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::Ocp; - /// - /// sg.set_pa_ocp(Ocp::Max140m)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_pa_ocp(&mut self, ocp: Ocp) -> Result<(), Error> { self.write(wr_reg![PAOCP, ocp as u8]) } - /// Set the HSE32 crystal OSC_IN load capaitor trimming. + /// Restart the radio RTC. /// - /// # Example + /// This is used to workaround an erratum for [`set_rx_duty_cycle`]. /// - /// Set the trim to the lowest value. + /// [`set_rx_duty_cycle`]: crate::subghz::SubGhz::set_rx_duty_cycle + pub fn restart_rtc(&mut self) -> Result<(), Error> { + self.write(wr_reg![RTCCTLR, 0b1]) + } + + /// Set the radio real-time-clock period. /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::HseTrim; + /// This is used to workaround an erratum for [`set_rx_duty_cycle`]. /// - /// sg.set_hse_in_trim(HseTrim::MIN)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` + /// [`set_rx_duty_cycle`]: crate::subghz::SubGhz::set_rx_duty_cycle + pub fn set_rtc_period(&mut self, period: Timeout) -> Result<(), Error> { + let tobits: u32 = period.into_bits(); + self.write(wr_reg![ + RTCPRDR2, + (tobits >> 16) as u8, + (tobits >> 8) as u8, + tobits as u8 + ]) + } + + /// Set the HSE32 crystal OSC_IN load capacitor trimming. pub fn set_hse_in_trim(&mut self, trim: HseTrim) -> Result<(), Error> { self.write(wr_reg![HSEINTRIM, trim.into()]) } - /// Set the HSE32 crystal OSC_OUT load capaitor trimming. - /// - /// # Example - /// - /// Set the trim to the lowest value. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::HseTrim; - /// - /// sg.set_hse_out_trim(HseTrim::MIN)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` + /// Set the HSE32 crystal OSC_OUT load capacitor trimming. pub fn set_hse_out_trim(&mut self, trim: HseTrim) -> Result<(), Error> { self.write(wr_reg![HSEOUTTRIM, trim.into()]) } @@ -510,6 +444,33 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { pub fn set_smps_drv(&mut self, drv: SmpsDrv) -> Result<(), Error> { self.write(wr_reg![SMPSC2, (drv as u8) << 1]) } + + /// Set the node address. + /// + /// Used with [`GenericPacketParams::set_addr_comp`] to filter packets based + /// on node address. + pub fn set_node_addr(&mut self, addr: u8) -> Result<(), Error> { + self.write(wr_reg![NODE, addr]) + } + + /// Set the broadcast address. + /// + /// Used with [`GenericPacketParams::set_addr_comp`] to filter packets based + /// on broadcast address. + pub fn set_broadcast_addr(&mut self, addr: u8) -> Result<(), Error> { + self.write(wr_reg![BROADCAST, addr]) + } + + /// Set both the broadcast address and node address. + /// + /// This is a combination of [`set_node_addr`] and [`set_broadcast_addr`] + /// in a single SPI transfer. + /// + /// [`set_node_addr`]: Self::set_node_addr + /// [`set_broadcast_addr`]: Self::set_broadcast_addr + pub fn set_addrs(&mut self, node: u8, broadcast: u8) -> Result<(), Error> { + self.write(wr_reg![NODE, node, broadcast]) + } } // 5.8.3 @@ -548,38 +509,17 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// # Ok::<(), embassy_stm32::subghz::Error>(()) /// ``` pub unsafe fn set_sleep(&mut self, cfg: SleepCfg) -> Result<(), Error> { - self.write(&[OpCode::SetSleep as u8, u8::from(cfg)]) + // poll for busy before, but not after + // radio idles with busy high while in sleep mode + self.poll_not_busy(); + { + let _nss: Nss = Nss::new(); + self.spi.blocking_write(&[OpCode::SetSleep as u8, u8::from(cfg)])?; + } + Ok(()) } /// Put the radio into standby mode. - /// - /// # Examples - /// - /// Put the radio into standby mode using the RC 13MHz clock. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::StandbyClk; - /// - /// sg.set_standby(StandbyClk::Rc)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// Put the radio into standby mode using the HSE32 clock. - /// - /// ```no_run - /// # let mut dp = unsafe { embassy_stm32::pac::Peripherals::steal() }; - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::StandbyClk; - /// - /// dp.RCC - /// .cr - /// .modify(|_, w| w.hseon().enabled().hsebyppwr().vddtcxo()); - /// while dp.RCC.cr.read().hserdy().is_not_ready() {} - /// - /// sg.set_standby(StandbyClk::Hse)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_standby(&mut self, standby_clk: StandbyClk) -> Result<(), Error> { self.write(&[OpCode::SetStandby as u8, u8::from(standby_clk)]) } @@ -593,35 +533,12 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// I honestly do not see any use for it. Please update this description /// if you know more than I do. /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::RfFreq; - /// - /// sg.set_rf_frequency(&RfFreq::from_frequency(915_000_000))?; - /// sg.set_fs()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// /// [`set_rf_frequency`]: crate::subghz::SubGhz::set_rf_frequency pub fn set_fs(&mut self) -> Result<(), Error> { self.write(&[OpCode::SetFs.into()]) } - /// Set the sub-GHz radio in TX mode. - /// - /// # Example - /// - /// Transmit with no timeout. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::Timeout; - /// - /// sg.set_tx(Timeout::DISABLED)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` + /// Setup the sub-GHz radio for TX. pub fn set_tx(&mut self, timeout: Timeout) -> Result<(), Error> { let tobits: u32 = timeout.into_bits(); self.write(&[ @@ -632,20 +549,7 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { ]) } - /// Set the sub-GHz radio in RX mode. - /// - /// # Example - /// - /// Receive with a 1 second timeout. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use core::time::Duration; - /// use embassy_stm32::subghz::Timeout; - /// - /// sg.set_rx(Timeout::from_duration_sat(Duration::from_secs(1)))?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` + /// Setup the sub-GHz radio for RX. pub fn set_rx(&mut self, timeout: Timeout) -> Result<(), Error> { let tobits: u32 = timeout.into_bits(); self.write(&[ @@ -657,18 +561,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { } /// Allows selection of the receiver event which stops the RX timeout timer. - /// - /// # Example - /// - /// Set the RX timeout timer to stop on preamble detection. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::RxTimeoutStop; - /// - /// sg.set_rx_timeout_stop(RxTimeoutStop::Preamble)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_rx_timeout_stop(&mut self, rx_timeout_stop: RxTimeoutStop) -> Result<(), Error> { self.write(&[OpCode::SetStopRxTimerOnPreamble.into(), rx_timeout_stop.into()]) } @@ -701,23 +593,39 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// * if [`set_standby`] is sent during the listening period or after the /// sub-GHz has been requested to exit sleep mode by sub-GHz radio SPI NSS /// - /// # Example + /// # Erratum + /// + /// When a preamble is detected the radio should restart the RX timeout + /// with a value of 2 × `rx_period` + `sleep_period`. + /// Instead the radio erroneously uses `sleep_period`. + /// + /// To workaround this use [`restart_rtc`] and [`set_rtc_period`] to + /// reprogram the radio timeout to 2 × `rx_period` + `sleep_period`. + /// + /// Use code similar to this in the [`PreambleDetected`] interrupt handler. /// /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use core::time::Duration; - /// use embassy_stm32::subghz::{StandbyClk, Timeout}; + /// # let rx_period: Timeout = Timeout::from_millis_sat(100); + /// # let sleep_period: Timeout = Timeout::from_millis_sat(100); + /// # let mut sg = unsafe { stm32wlxx_hal::subghz::SubGhz::steal() }; + /// use stm32wlxx_hal::subghz::Timeout; /// - /// const RX_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_millis(100)); - /// const SLEEP_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_secs(1)); + /// let period: Timeout = rx_period + /// .saturating_add(rx_period) + /// .saturating_add(sleep_period); /// - /// sg.set_standby(StandbyClk::Rc)?; - /// sg.set_rx_duty_cycle(RX_PERIOD, SLEEP_PERIOD)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) + /// sg.set_rtc_period(period)?; + /// sg.restart_rtc()?; + /// # Ok::<(), stm32wlxx_hal::subghz::Error>(()) /// ``` /// + /// Please read the erratum for more details. + /// + /// [`PreambleDetected`]: crate::subghz::Irq::PreambleDetected + /// [`restart_rtc`]: crate::subghz::SubGhz::restart_rtc /// [`RxDone`]: crate::subghz::Irq::RxDone /// [`set_rf_frequency`]: crate::subghz::SubGhz::set_rf_frequency + /// [`set_rtc_period`]: crate::subghz::SubGhz::set_rtc_period /// [`set_standby`]: crate::subghz::SubGhz::set_standby pub fn set_rx_duty_cycle(&mut self, rx_period: Timeout, sleep_period: Timeout) -> Result<(), Error> { let rx_period_bits: u32 = rx_period.into_bits(); @@ -745,27 +653,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// The length of the search must be configured with [`set_cad_params`] /// prior to calling `set_cad`. /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use core::time::Duration; - /// use embassy_stm32::subghz::{CadParams, ExitMode, NbCadSymbol, StandbyClk, Timeout}; - /// - /// const RX_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_millis(100)); - /// const SLEEP_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_secs(1)); - /// const CAD_PARAMS: CadParams = CadParams::new() - /// .set_num_symbol(NbCadSymbol::S4) - /// .set_det_peak(0x18) - /// .set_det_min(0x10) - /// .set_exit_mode(ExitMode::Standby); - /// - /// sg.set_standby(StandbyClk::Rc)?; - /// sg.set_cad_params(&CAD_PARAMS)?; - /// sg.set_cad()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// /// [`set_cad_params`]: crate::subghz::SubGhz::set_cad_params pub fn set_cad(&mut self) -> Result<(), Error> { self.write(&[OpCode::SetCad.into()]) @@ -775,14 +662,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// /// The sub-GHz radio remains in continuous transmit tone mode until a mode /// configuration command is received. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// sg.set_tx_continuous_wave()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_tx_continuous_wave(&mut self) -> Result<(), Error> { self.write(&[OpCode::SetTxContinuousWave as u8]) } @@ -794,14 +673,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// The preamble is symbol 0 in LoRa modulation. /// The sub-GHz radio remains in infinite preamble mode until a mode /// configuration command is received. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// sg.set_tx_continuous_preamble()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_tx_continuous_preamble(&mut self) -> Result<(), Error> { self.write(&[OpCode::SetTxContinuousPreamble as u8]) } @@ -811,342 +682,80 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// Radio configuration commands impl<'d> SubGhz<'d, NoDma, NoDma> { /// Set the packet type (modulation scheme). - /// - /// # Examples - /// - /// FSK (frequency shift keying): - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::PacketType; - /// - /// sg.set_packet_type(PacketType::Fsk)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// LoRa (long range): - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::PacketType; - /// - /// sg.set_packet_type(PacketType::LoRa)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// BPSK (binary phase shift keying): - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::PacketType; - /// - /// sg.set_packet_type(PacketType::Bpsk)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// MSK (minimum shift keying): - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::PacketType; - /// - /// sg.set_packet_type(PacketType::Msk)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_packet_type(&mut self, packet_type: PacketType) -> Result<(), Error> { self.write(&[OpCode::SetPacketType as u8, packet_type as u8]) } /// Get the packet type. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::PacketType; - /// - /// sg.set_packet_type(PacketType::LoRa)?; - /// assert_eq!(sg.packet_type()?, Ok(PacketType::LoRa)); - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn packet_type(&mut self) -> Result<Result<PacketType, u8>, Error> { let pkt_type: [u8; 2] = self.read_n(OpCode::GetPacketType)?; Ok(PacketType::from_raw(pkt_type[1])) } /// Set the radio carrier frequency. - /// - /// # Example - /// - /// Set the frequency to 915MHz (Australia and North America). - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::RfFreq; - /// - /// sg.set_rf_frequency(&RfFreq::F915)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_rf_frequency(&mut self, freq: &RfFreq) -> Result<(), Error> { self.write(freq.as_slice()) } /// Set the transmit output power and the PA ramp-up time. - /// - /// # Example - /// - /// Set the output power to +10 dBm (low power mode) and a ramp up time of - /// 40 microseconds. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{PaConfig, PaSel, RampTime, TxParams}; - /// - /// const TX_PARAMS: TxParams = TxParams::new() - /// .set_ramp_time(RampTime::Micros40) - /// .set_power(0x0D); - /// const PA_CONFIG: PaConfig = PaConfig::new() - /// .set_pa(PaSel::Lp) - /// .set_pa_duty_cycle(0x1) - /// .set_hp_max(0x0); - /// - /// sg.set_pa_config(&PA_CONFIG)?; - /// sg.set_tx_params(&TX_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_tx_params(&mut self, params: &TxParams) -> Result<(), Error> { self.write(params.as_slice()) } - /// Power amplifier configuation. + /// Power amplifier configuration. /// /// Used to customize the maximum output power and efficiency. - /// - /// # Example - /// - /// Set the output power to +22 dBm (high power mode) and a ramp up time of - /// 200 microseconds. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{PaConfig, PaSel, RampTime, TxParams}; - /// - /// const TX_PARAMS: TxParams = TxParams::new() - /// .set_ramp_time(RampTime::Micros200) - /// .set_power(0x16); - /// const PA_CONFIG: PaConfig = PaConfig::new() - /// .set_pa(PaSel::Hp) - /// .set_pa_duty_cycle(0x4) - /// .set_hp_max(0x7); - /// - /// sg.set_pa_config(&PA_CONFIG)?; - /// sg.set_tx_params(&TX_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_pa_config(&mut self, pa_config: &PaConfig) -> Result<(), Error> { self.write(pa_config.as_slice()) } /// Operating mode to enter after a successful packet transmission or /// packet reception. - /// - /// # Example - /// - /// Set the fallback mode to standby mode. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::FallbackMode; - /// - /// sg.set_tx_rx_fallback_mode(FallbackMode::Standby)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_tx_rx_fallback_mode(&mut self, fm: FallbackMode) -> Result<(), Error> { self.write(&[OpCode::SetTxRxFallbackMode as u8, fm as u8]) } /// Set channel activity detection (CAD) parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use core::time::Duration; - /// use embassy_stm32::subghz::{CadParams, ExitMode, NbCadSymbol, StandbyClk, Timeout}; - /// - /// const RX_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_millis(100)); - /// const SLEEP_PERIOD: Timeout = Timeout::from_duration_sat(Duration::from_secs(1)); - /// const CAD_PARAMS: CadParams = CadParams::new() - /// .set_num_symbol(NbCadSymbol::S4) - /// .set_det_peak(0x18) - /// .set_det_min(0x10) - /// .set_exit_mode(ExitMode::Standby); - /// - /// sg.set_standby(StandbyClk::Rc)?; - /// sg.set_cad_params(&CAD_PARAMS)?; - /// sg.set_cad()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_cad_params(&mut self, params: &CadParams) -> Result<(), Error> { self.write(params.as_slice()) } /// Set the data buffer base address for the packet handling in TX and RX. /// - /// There is a 256B TX buffer and a 256B RX buffer. - /// These buffers are not memory mapped, they are accessed via the - /// [`read_buffer`] and [`write_buffer`] methods. - /// - /// # Example - /// - /// Set the TX and RX buffer base to the start. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// sg.set_buffer_base_address(0, 0)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// [`read_buffer`]: SubGhz::read_buffer - /// [`write_buffer`]: SubGhz::write_buffer + /// There is a single buffer for both TX and RX. + /// The buffer is not memory mapped, it is accessed via the + /// [`read_buffer`](SubGhz::read_buffer) and + /// [`write_buffer`](SubGhz::write_buffer) methods. pub fn set_buffer_base_address(&mut self, tx: u8, rx: u8) -> Result<(), Error> { self.write(&[OpCode::SetBufferBaseAddress as u8, tx, rx]) } /// Set the (G)FSK modulation parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{ - /// FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape, PacketType, - /// }; - /// - /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000); - /// const PULSE_SHAPE: FskPulseShape = FskPulseShape::Bt03; - /// const BW: FskBandwidth = FskBandwidth::Bw9; - /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); - /// - /// const MOD_PARAMS: FskModParams = FskModParams::new() - /// .set_bitrate(BITRATE) - /// .set_pulse_shape(PULSE_SHAPE) - /// .set_bandwidth(BW) - /// .set_fdev(FDEV); - /// - /// sg.set_packet_type(PacketType::Fsk)?; - /// sg.set_fsk_mod_params(&MOD_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_fsk_mod_params(&mut self, params: &FskModParams) -> Result<(), Error> { self.write(params.as_slice()) } /// Set the LoRa modulation parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{ - /// CodingRate, LoRaBandwidth, LoRaModParams, PacketType, SpreadingFactor, - /// }; - /// - /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new() - /// .set_sf(SpreadingFactor::Sf7) - /// .set_bw(LoRaBandwidth::Bw125) - /// .set_cr(CodingRate::Cr45) - /// .set_ldro_en(false); - /// - /// sg.set_packet_type(PacketType::LoRa)?; - /// sg.set_lora_mod_params(&MOD_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_lora_mod_params(&mut self, params: &LoRaModParams) -> Result<(), Error> { self.write(params.as_slice()) } /// Set the BPSK modulation parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{BpskModParams, FskBitrate, PacketType}; - /// - /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(FskBitrate::from_bps(600)); - /// - /// sg.set_packet_type(PacketType::Bpsk)?; - /// sg.set_bpsk_mod_params(&MOD_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_bpsk_mod_params(&mut self, params: &BpskModParams) -> Result<(), Error> { self.write(params.as_slice()) } /// Set the generic (FSK) packet parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{ - /// AddrComp, CrcType, GenericPacketParams, HeaderType, PacketType, PreambleDetection, - /// }; - /// - /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new() - /// .set_preamble_len(8) - /// .set_preamble_detection(PreambleDetection::Disabled) - /// .set_sync_word_len(2) - /// .set_addr_comp(AddrComp::Disabled) - /// .set_header_type(HeaderType::Fixed) - /// .set_payload_len(128) - /// .set_crc_type(CrcType::Byte2) - /// .set_whitening_enable(true); - /// - /// sg.set_packet_type(PacketType::Fsk)?; - /// sg.set_packet_params(&PKT_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_packet_params(&mut self, params: &GenericPacketParams) -> Result<(), Error> { self.write(params.as_slice()) } /// Set the BPSK packet parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{BpskPacketParams, PacketType}; - /// - /// sg.set_packet_type(PacketType::Bpsk)?; - /// sg.set_bpsk_packet_params(&BpskPacketParams::new().set_payload_len(64))?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_bpsk_packet_params(&mut self, params: &BpskPacketParams) -> Result<(), Error> { self.write(params.as_slice()) } /// Set the LoRa packet parameters. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{HeaderType, LoRaPacketParams, PacketType}; - /// - /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new() - /// .set_preamble_len(5 * 8) - /// .set_header_type(HeaderType::Fixed) - /// .set_payload_len(64) - /// .set_crc_en(true) - /// .set_invert_iq(true); - /// - /// sg.set_packet_type(PacketType::LoRa)?; - /// sg.set_lora_packet_params(&PKT_PARAMS)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_lora_packet_params(&mut self, params: &LoRaPacketParams) -> Result<(), Error> { self.write(params.as_slice()) } @@ -1155,19 +764,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// reception of a LoRa packet. /// /// Packet reception is started after `n` + 1 symbols are detected. - /// - /// # Example - /// - /// Start reception after a single LoRa word is detected - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// - /// // ... setup the radio for LoRa RX - /// - /// sg.set_lora_symb_timeout(0)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_lora_symb_timeout(&mut self, n: u8) -> Result<(), Error> { self.write(&[OpCode::SetLoRaSymbTimeout.into(), n]) } @@ -1182,14 +778,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// will return reserved values. /// See this thread in the ST community for details: [link] /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::Status; - /// - /// let status: Status = sg.status()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// /// [link]: https://community.st.com/s/question/0D53W00000hR9GQSA0/stm32wl55-getstatus-command-returns-reserved-cmdstatus pub fn status(&mut self) -> Result<Status, Error> { Ok(self.read_1(OpCode::GetStatus)?.into()) @@ -1198,80 +786,17 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// Get the RX buffer status. /// /// The return tuple is (status, payload_length, buffer_pointer). - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{CmdStatus, Timeout}; - /// - /// sg.set_rx(Timeout::DISABLED)?; - /// loop { - /// let (status, len, ptr) = sg.rx_buffer_status()?; - /// - /// if status.cmd() == Ok(CmdStatus::Avaliable) { - /// let mut buf: [u8; 256] = [0; 256]; - /// let data: &mut [u8] = &mut buf[..usize::from(len)]; - /// sg.read_buffer(ptr, data)?; - /// // ... do things with the data - /// break; - /// } - /// } - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn rx_buffer_status(&mut self) -> Result<(Status, u8, u8), Error> { let data: [u8; 3] = self.read_n(OpCode::GetRxBufferStatus)?; Ok((data[0].into(), data[1], data[2])) } /// Returns information on the last received (G)FSK packet. - /// - /// # Example - /// - /// ```no_run - /// # use std::fmt::Write; - /// # let mut uart = String::new(); - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{CmdStatus, Timeout}; - /// - /// sg.set_rx(Timeout::DISABLED)?; - /// loop { - /// let pkt_status = sg.fsk_packet_status()?; - /// - /// if pkt_status.status().cmd() == Ok(CmdStatus::Avaliable) { - /// let rssi = pkt_status.rssi_avg(); - /// writeln!(&mut uart, "Avg RSSI: {} dBm", rssi); - /// break; - /// } - /// } - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn fsk_packet_status(&mut self) -> Result<FskPacketStatus, Error> { Ok(FskPacketStatus::from(self.read_n(OpCode::GetPacketStatus)?)) } /// Returns information on the last received LoRa packet. - /// - /// # Example - /// - /// ```no_run - /// # use std::fmt::Write; - /// # let mut uart = String::new(); - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{CmdStatus, Timeout}; - /// - /// sg.set_rx(Timeout::DISABLED)?; - /// loop { - /// let pkt_status = sg.lora_packet_status()?; - /// - /// if pkt_status.status().cmd() == Ok(CmdStatus::Avaliable) { - /// let snr = pkt_status.snr_pkt(); - /// writeln!(&mut uart, "SNR: {} dB", snr); - /// break; - /// } - /// } - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn lora_packet_status(&mut self) -> Result<LoRaPacketStatus, Error> { Ok(LoRaPacketStatus::from(self.read_n(OpCode::GetPacketStatus)?)) } @@ -1279,22 +804,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// Get the instantaneous signal strength during packet reception. /// /// The units are in dbm. - /// - /// # Example - /// - /// Log the instantaneous signal strength to UART. - /// - /// ```no_run - /// # use std::fmt::Write; - /// # let mut uart = String::new(); - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{CmdStatus, Timeout}; - /// - /// sg.set_rx(Timeout::DISABLED)?; - /// let (_, rssi) = sg.rssi_inst()?; - /// writeln!(&mut uart, "RSSI: {} dBm", rssi); - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn rssi_inst(&mut self) -> Result<(Status, Ratio<i16>), Error> { let data: [u8; 2] = self.read_n(OpCode::GetRssiInst)?; let status: Status = data[0].into(); @@ -1304,54 +813,19 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { } /// (G)FSK packet stats. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{FskStats, Stats}; - /// - /// let stats: Stats<FskStats> = sg.fsk_stats()?; - /// // ... use stats - /// sg.reset_stats()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn fsk_stats(&mut self) -> Result<Stats<FskStats>, Error> { let data: [u8; 7] = self.read_n(OpCode::GetStats)?; Ok(Stats::from_raw_fsk(data)) } /// LoRa packet stats. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{LoRaStats, Stats}; - /// - /// let stats: Stats<LoRaStats> = sg.lora_stats()?; - /// // ... use stats - /// sg.reset_stats()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn lora_stats(&mut self) -> Result<Stats<LoRaStats>, Error> { let data: [u8; 7] = self.read_n(OpCode::GetStats)?; Ok(Stats::from_raw_lora(data)) } - /// Reset the stats as reported in [`lora_stats`] and [`fsk_stats`]. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// - /// sg.reset_stats()?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// [`lora_stats`]: crate::subghz::SubGhz::lora_stats - /// [`fsk_stats`]: crate::subghz::SubGhz::fsk_stats + /// Reset the stats as reported in [`lora_stats`](SubGhz::lora_stats) and + /// [`fsk_stats`](SubGhz::fsk_stats). pub fn reset_stats(&mut self) -> Result<(), Error> { const RESET_STATS: [u8; 7] = [0x00; 7]; self.write(&RESET_STATS) @@ -1362,49 +836,11 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// IRQ commands impl<'d> SubGhz<'d, NoDma, NoDma> { /// Set the interrupt configuration. - /// - /// # Example - /// - /// Enable TX and timeout interrupts. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{CfgIrq, Irq}; - /// - /// const IRQ_CFG: CfgIrq = CfgIrq::new() - /// .irq_enable_all(Irq::TxDone) - /// .irq_enable_all(Irq::Timeout); - /// sg.set_irq_cfg(&IRQ_CFG)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_irq_cfg(&mut self, cfg: &CfgIrq) -> Result<(), Error> { self.write(cfg.as_slice()) } /// Get the IRQ status. - /// - /// # Example - /// - /// Wait for TX to complete or timeout. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::Irq; - /// - /// loop { - /// let (_, irq_status) = sg.irq_status()?; - /// sg.clear_irq_status(irq_status)?; - /// if irq_status & Irq::TxDone.mask() != 0 { - /// // handle TX done - /// break; - /// } - /// if irq_status & Irq::Timeout.mask() != 0 { - /// // handle timeout - /// break; - /// } - /// } - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn irq_status(&mut self) -> Result<(Status, u16), Error> { let data: [u8; 3] = self.read_n(OpCode::GetIrqStatus)?; let irq_status: u16 = u16::from_be_bytes([data[1], data[2]]); @@ -1412,21 +848,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { } /// Clear the IRQ status. - /// - /// # Example - /// - /// Clear the [`TxDone`] and [`RxDone`] interrupts. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::Irq; - /// - /// sg.clear_irq_status(Irq::TxDone.mask() | Irq::RxDone.mask())?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// [`TxDone`]: crate::subghz::Irq::TxDone - /// [`RxDone`]: crate::subghz::Irq::RxDone pub fn clear_irq_status(&mut self, mask: u16) -> Result<(), Error> { self.write(&[OpCode::ClrIrqStatus as u8, (mask >> 8) as u8, mask as u8]) } @@ -1436,25 +857,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// Miscellaneous commands impl<'d> SubGhz<'d, NoDma, NoDma> { /// Calibrate one or several blocks at any time when in standby mode. - /// - /// The blocks to calibrate are defined by `cal` argument. - /// When the calibration is ongoing, BUSY is set. - /// A falling edge on BUSY indicates the end of all enabled calibrations. - /// - /// This function will not poll for BUSY. - /// - /// # Example - /// - /// Calibrate the RC 13 MHz and PLL. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{Calibrate, StandbyClk, SubGhz}; - /// - /// sg.set_standby(StandbyClk::Rc)?; - /// sg.calibrate(Calibrate::Rc13M.mask() | Calibrate::Pll.mask())?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn calibrate(&mut self, cal: u8) -> Result<(), Error> { // bit 7 is reserved and must be kept at reset value. self.write(&[OpCode::Calibrate as u8, cal & 0x7F]) @@ -1463,86 +865,22 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// Calibrate the image at the given frequencies. /// /// Requires the radio to be in standby mode. - /// - /// # Example - /// - /// Calibrate the image for the 430 - 440 MHz ISM band. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{CalibrateImage, StandbyClk}; - /// - /// sg.set_standby(StandbyClk::Rc)?; - /// sg.calibrate_image(CalibrateImage::ISM_430_440)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn calibrate_image(&mut self, cal: CalibrateImage) -> Result<(), Error> { self.write(&[OpCode::CalibrateImage as u8, cal.0, cal.1]) } /// Set the radio power supply. - /// - /// # Examples - /// - /// Use the linear dropout regulator (LDO): - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::RegMode; - /// - /// sg.set_regulator_mode(RegMode::Ldo)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// Use the switch mode power supply (SPMS): - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::RegMode; - /// - /// sg.set_regulator_mode(RegMode::Smps)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_regulator_mode(&mut self, reg_mode: RegMode) -> Result<(), Error> { self.write(&[OpCode::SetRegulatorMode as u8, reg_mode as u8]) } /// Get the radio operational errors. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::OpError; - /// - /// let (status, error_mask) = sg.op_error()?; - /// if error_mask & OpError::PllLockError.mask() != 0 { - /// // ... handle PLL lock error - /// } - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn op_error(&mut self) -> Result<(Status, u16), Error> { let data: [u8; 3] = self.read_n(OpCode::GetError)?; - Ok((data[0].into(), u16::from_le_bytes([data[1], data[2]]))) + Ok((data[0].into(), u16::from_be_bytes([data[1], data[2]]))) } - /// Clear all errors as reported by [`op_error`]. - /// - /// # Example - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::OpError; - /// - /// let (status, error_mask) = sg.op_error()?; - /// // ignore all errors - /// if error_mask != 0 { - /// sg.clear_error()?; - /// } - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` - /// - /// [`op_error`]: crate::subghz::SubGhz::op_error + /// Clear all errors as reported by [`op_error`](SubGhz::op_error). pub fn clear_error(&mut self) -> Result<(), Error> { self.write(&[OpCode::ClrError as u8, 0x00]) } @@ -1552,21 +890,6 @@ impl<'d> SubGhz<'d, NoDma, NoDma> { /// Set TCXO mode command impl<'d> SubGhz<'d, NoDma, NoDma> { /// Set the TCXO trim and HSE32 ready timeout. - /// - /// # Example - /// - /// Setup the TCXO with 1.7V trim and a 10ms timeout. - /// - /// ```no_run - /// # let mut sg = embassy_stm32::subghz::SubGhz::new(p.SUBGHZSPI, ...); - /// use embassy_stm32::subghz::{TcxoMode, TcxoTrim, Timeout}; - /// - /// const TCXO_MODE: TcxoMode = TcxoMode::new() - /// .set_txco_trim(TcxoTrim::Volts1pt7) - /// .set_timeout(Timeout::from_millis_sat(10)); - /// sg.set_tcxo_mode(&TCXO_MODE)?; - /// # Ok::<(), embassy_stm32::subghz::Error>(()) - /// ``` pub fn set_tcxo_mode(&mut self, tcxo_mode: &TcxoMode) -> Result<(), Error> { self.write(tcxo_mode.as_slice()) } @@ -1642,6 +965,10 @@ pub(crate) enum Register { GCRCPOLRH = 0x06BE, /// Generic synchronization word 7. GSYNC7 = 0x06C0, + /// Node address. + NODE = 0x06CD, + /// Broadcast address. + BROADCAST = 0x06CE, /// LoRa synchronization word MSB. LSYNCH = 0x0740, /// LoRa synchronization word LSB. @@ -1651,6 +978,16 @@ pub(crate) enum Register { RXGAINC = 0x08AC, /// PA over current protection. PAOCP = 0x08E7, + /// RTC control. + RTCCTLR = 0x0902, + /// RTC period MSB. + RTCPRDR2 = 0x0906, + /// RTC period mid-byte. + #[allow(dead_code)] + RTCPRDR1 = 0x0907, + /// RTC period LSB. + #[allow(dead_code)] + RTCPRDR0 = 0x0908, /// HSE32 OSC_IN capacitor trim. HSEINTRIM = 0x0911, /// HSE32 OSC_OUT capacitor trim. diff --git a/embassy-stm32/src/subghz/mod_params.rs b/embassy-stm32/src/subghz/mod_params.rs index 0bfcb43b..d997ae11 100644 --- a/embassy-stm32/src/subghz/mod_params.rs +++ b/embassy-stm32/src/subghz/mod_params.rs @@ -52,7 +52,7 @@ impl FskBandwidth { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskBandwidth; + /// use stm32wlxx_hal::subghz::FskBandwidth; /// /// assert_eq!(FskBandwidth::Bw4.hertz(), 4_800); /// assert_eq!(FskBandwidth::Bw5.hertz(), 5_800); @@ -109,7 +109,7 @@ impl FskBandwidth { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskBandwidth; + /// use stm32wlxx_hal::subghz::FskBandwidth; /// /// assert_eq!(FskBandwidth::from_bits(0x1F), Ok(FskBandwidth::Bw4)); /// assert_eq!(FskBandwidth::from_bits(0x17), Ok(FskBandwidth::Bw5)); @@ -206,7 +206,7 @@ impl FskBitrate { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskBitrate; + /// use stm32wlxx_hal::subghz::FskBitrate; /// /// const BITRATE: FskBitrate = FskBitrate::from_bps(9600); /// assert_eq!(BITRATE.as_bps(), 9600); @@ -235,7 +235,7 @@ impl FskBitrate { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskBitrate; + /// use stm32wlxx_hal::subghz::FskBitrate; /// /// const BITRATE: FskBitrate = FskBitrate::from_raw(0x7D00); /// assert_eq!(BITRATE.as_bps(), 32_000); @@ -251,7 +251,7 @@ impl FskBitrate { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskBitrate; + /// use stm32wlxx_hal::subghz::FskBitrate; /// /// const BITS_PER_SEC: u32 = 9600; /// const BITRATE: FskBitrate = FskBitrate::from_bps(BITS_PER_SEC); @@ -296,7 +296,7 @@ impl FskFdev { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskFdev; + /// use stm32wlxx_hal::subghz::FskFdev; /// /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); /// assert_eq!(FDEV.as_hertz(), 31_250); @@ -317,7 +317,7 @@ impl FskFdev { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskFdev; + /// use stm32wlxx_hal::subghz::FskFdev; /// /// const FDEV: FskFdev = FskFdev::from_raw(0x8000); /// assert_eq!(FDEV.as_hertz(), 31_250); @@ -333,7 +333,7 @@ impl FskFdev { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskFdev; + /// use stm32wlxx_hal::subghz::FskFdev; /// /// const HERTZ: u32 = 31_250; /// const FDEV: FskFdev = FskFdev::from_hertz(HERTZ); @@ -348,7 +348,7 @@ impl FskFdev { } } -/// (G)FSK modulation paramters. +/// (G)FSK modulation parameters. #[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct FskModParams { @@ -363,7 +363,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::FskModParams; + /// use stm32wlxx_hal::subghz::FskModParams; /// /// const MOD_PARAMS: FskModParams = FskModParams::new(); /// ``` @@ -394,7 +394,7 @@ impl FskModParams { /// Setting the bitrate to 32,000 bits per second. /// /// ``` - /// use stm32wl_hal::subghz::{FskBitrate, FskModParams}; + /// use stm32wlxx_hal::subghz::{FskBitrate, FskModParams}; /// /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000); /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bitrate(BITRATE); @@ -412,7 +412,7 @@ impl FskModParams { /// Setting the bitrate to 32,000 bits per second. /// /// ``` - /// use stm32wl_hal::subghz::{FskBitrate, FskModParams}; + /// use stm32wlxx_hal::subghz::{FskBitrate, FskModParams}; /// /// const BITRATE: FskBitrate = FskBitrate::from_bps(32_000); /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bitrate(BITRATE); @@ -434,7 +434,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskModParams, FskPulseShape}; + /// use stm32wlxx_hal::subghz::{FskModParams, FskPulseShape}; /// /// const MOD_PARAMS: FskModParams = FskModParams::new().set_pulse_shape(FskPulseShape::Bt03); /// # assert_eq!(MOD_PARAMS.as_slice()[4], 0x08); @@ -453,7 +453,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskBandwidth, FskModParams}; + /// use stm32wlxx_hal::subghz::{FskBandwidth, FskModParams}; /// /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bandwidth(FskBandwidth::Bw9); /// assert_eq!(MOD_PARAMS.bandwidth(), Ok(FskBandwidth::Bw9)); @@ -467,7 +467,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskBandwidth, FskModParams}; + /// use stm32wlxx_hal::subghz::{FskBandwidth, FskModParams}; /// /// const MOD_PARAMS: FskModParams = FskModParams::new().set_bandwidth(FskBandwidth::Bw9); /// # assert_eq!(MOD_PARAMS.as_slice()[5], 0x1E); @@ -483,7 +483,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskFdev, FskModParams}; + /// use stm32wlxx_hal::subghz::{FskFdev, FskModParams}; /// /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); /// const MOD_PARAMS: FskModParams = FskModParams::new().set_fdev(FDEV); @@ -499,7 +499,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskFdev, FskModParams}; + /// use stm32wlxx_hal::subghz::{FskFdev, FskModParams}; /// /// const FDEV: FskFdev = FskFdev::from_hertz(31_250); /// const MOD_PARAMS: FskModParams = FskModParams::new().set_fdev(FDEV); @@ -536,7 +536,7 @@ impl FskModParams { /// /// ``` /// extern crate static_assertions as sa; - /// use stm32wl_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape}; + /// use stm32wlxx_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape}; /// /// const MOD_PARAMS: FskModParams = FskModParams::new() /// .set_bitrate(FskBitrate::from_bps(20_000)) @@ -576,7 +576,7 @@ impl FskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape}; + /// use stm32wlxx_hal::subghz::{FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape}; /// /// const BITRATE: FskBitrate = FskBitrate::from_bps(20_000); /// const PULSE_SHAPE: FskPulseShape = FskPulseShape::Bt03; @@ -608,6 +608,9 @@ impl Default for FskModParams { /// LoRa spreading factor. /// /// Argument of [`LoRaModParams::set_sf`]. +/// +/// Higher spreading factors improve receiver sensitivity, but reduce bit rate +/// and increase power consumption. #[derive(Debug, PartialEq, Eq, Clone, Copy, PartialOrd, Ord)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(u8)] @@ -671,7 +674,7 @@ impl LoRaBandwidth { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::LoRaBandwidth; + /// use stm32wlxx_hal::subghz::LoRaBandwidth; /// /// assert_eq!(LoRaBandwidth::Bw7.hertz(), 7_810); /// assert_eq!(LoRaBandwidth::Bw10.hertz(), 10_420); @@ -715,23 +718,38 @@ impl PartialOrd for LoRaBandwidth { /// LoRa forward error correction coding rate. /// /// Argument of [`LoRaModParams::set_cr`]. +/// +/// A higher coding rate provides better immunity to interference at the expense +/// of longer transmission time. +/// In normal conditions [`CodingRate::Cr45`] provides the best trade off. +/// In case of strong interference, a higher coding rate may be used. #[derive(Debug, PartialEq, Eq, Clone, Copy, PartialOrd, Ord)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[repr(u8)] pub enum CodingRate { /// No forward error correction coding rate 4/4 + /// + /// Overhead ratio of 1 Cr44 = 0x00, /// Forward error correction coding rate 4/5 + /// + /// Overhead ratio of 1.25 Cr45 = 0x1, /// Forward error correction coding rate 4/6 + /// + /// Overhead ratio of 1.5 Cr46 = 0x2, /// Forward error correction coding rate 4/7 + /// + /// Overhead ratio of 1.75 Cr47 = 0x3, /// Forward error correction coding rate 4/8 + /// + /// Overhead ratio of 2 Cr48 = 0x4, } -/// LoRa modulation paramters. +/// LoRa modulation parameters. #[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] @@ -747,7 +765,7 @@ impl LoRaModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::LoRaModParams; + /// use stm32wlxx_hal::subghz::LoRaModParams; /// /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new(); /// assert_eq!(MOD_PARAMS, LoRaModParams::default()); @@ -769,7 +787,7 @@ impl LoRaModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{LoRaModParams, SpreadingFactor}; + /// use stm32wlxx_hal::subghz::{LoRaModParams, SpreadingFactor}; /// /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_sf(SpreadingFactor::Sf7); /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x07, 0x00, 0x00, 0x00]); @@ -785,7 +803,7 @@ impl LoRaModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{LoRaBandwidth, LoRaModParams}; + /// use stm32wlxx_hal::subghz::{LoRaBandwidth, LoRaModParams}; /// /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_bw(LoRaBandwidth::Bw125); /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x04, 0x00, 0x00]); @@ -798,10 +816,12 @@ impl LoRaModParams { /// Set the forward error correction coding rate. /// + /// See [`CodingRate`] for more information. + /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CodingRate, LoRaModParams}; + /// use stm32wlxx_hal::subghz::{CodingRate, LoRaModParams}; /// /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_cr(CodingRate::Cr45); /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x00, 0x01, 0x00]); @@ -814,10 +834,29 @@ impl LoRaModParams { /// Set low data rate optimization enable. /// + /// For low data rates (typically high SF or low BW) and very long payloads + /// (may last several seconds), the low data rate optimization (LDRO) can be + /// enabled. + /// This reduces the number of bits per symbol to the given SF minus 2, + /// to allow the receiver to have a better tracking of the LoRa receive + /// signal. + /// Depending on the payload length, the low data rate optimization is + /// usually recommended when the LoRa symbol time is equal or above + /// 16.38 ms. + /// When using LoRa modulation, the total frequency drift over the packet + /// time must be kept lower than Freq_drift_max: + /// + /// Freq_drift_max = BW / (3 × 2SF) + /// + /// When possible, enabling the low data rate optimization, relaxes the + /// total frequency drift over the packet time by 16: + /// + /// Freq_drift_optimise_max = 16 × Freq_drift_max + /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::LoRaModParams; + /// use stm32wlxx_hal::subghz::LoRaModParams; /// /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new().set_ldro_en(true); /// # assert_eq!(MOD_PARAMS.as_slice(), &[0x8B, 0x05, 0x00, 0x00, 0x01]); @@ -833,7 +872,7 @@ impl LoRaModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CodingRate, LoRaBandwidth, LoRaModParams, SpreadingFactor}; + /// use stm32wlxx_hal::subghz::{CodingRate, LoRaBandwidth, LoRaModParams, SpreadingFactor}; /// /// const MOD_PARAMS: LoRaModParams = LoRaModParams::new() /// .set_sf(SpreadingFactor::Sf7) @@ -854,7 +893,7 @@ impl Default for LoRaModParams { } } -/// BPSK modulation paramters. +/// BPSK modulation parameters. /// /// **Note:** There is no method to set the pulse shape because there is only /// one valid pulse shape (Gaussian BT 0.5). @@ -872,7 +911,7 @@ impl BpskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::BpskModParams; + /// use stm32wlxx_hal::subghz::BpskModParams; /// /// const MOD_PARAMS: BpskModParams = BpskModParams::new(); /// assert_eq!(MOD_PARAMS, BpskModParams::default()); @@ -891,7 +930,7 @@ impl BpskModParams { /// Setting the bitrate to 600 bits per second. /// /// ``` - /// use stm32wl_hal::subghz::{BpskModParams, FskBitrate}; + /// use stm32wlxx_hal::subghz::{BpskModParams, FskBitrate}; /// /// const BITRATE: FskBitrate = FskBitrate::from_bps(600); /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(BITRATE); @@ -913,7 +952,7 @@ impl BpskModParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{BpskModParams, FskBitrate}; + /// use stm32wlxx_hal::subghz::{BpskModParams, FskBitrate}; /// /// const BITRATE: FskBitrate = FskBitrate::from_bps(100); /// const MOD_PARAMS: BpskModParams = BpskModParams::new().set_bitrate(BITRATE); diff --git a/embassy-stm32/src/subghz/op_error.rs b/embassy-stm32/src/subghz/op_error.rs index f7d7e741..b17b9920 100644 --- a/embassy-stm32/src/subghz/op_error.rs +++ b/embassy-stm32/src/subghz/op_error.rs @@ -31,7 +31,7 @@ impl OpError { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::OpError; + /// use stm32wlxx_hal::subghz::OpError; /// /// assert_eq!(OpError::PaRampError.mask(), 0b1_0000_0000); /// assert_eq!(OpError::PllLockError.mask(), 0b0_0100_0000); diff --git a/embassy-stm32/src/subghz/pa_config.rs b/embassy-stm32/src/subghz/pa_config.rs index 9833368c..875827bd 100644 --- a/embassy-stm32/src/subghz/pa_config.rs +++ b/embassy-stm32/src/subghz/pa_config.rs @@ -1,4 +1,4 @@ -/// Power amplifier configuration paramters. +/// Power amplifier configuration parameters. /// /// Argument of [`set_pa_config`]. /// @@ -52,7 +52,7 @@ impl PaConfig { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PaConfig; + /// use stm32wlxx_hal::subghz::PaConfig; /// /// const PA_CONFIG: PaConfig = PaConfig::new(); /// ``` @@ -71,14 +71,14 @@ impl PaConfig { /// # Caution /// /// The following restrictions must be observed to avoid over-stress on the PA: - /// * LP PA mode with synthesis frequency > 400 MHz, PaDutyCycle must be < 0x7. - /// * LP PA mode with synthesis frequency < 400 MHz, PaDutyCycle must be < 0x4. - /// * HP PA mode, PaDutyCycle must be < 0x4 + /// * LP PA mode with synthesis frequency > 400 MHz, `pa_duty_cycle` must be < 0x7. + /// * LP PA mode with synthesis frequency < 400 MHz, `pa_duty_cycle` must be < 0x4. + /// * HP PA mode, `pa_duty_cycle` must be < 0x4 /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{PaConfig, PaSel}; + /// use stm32wlxx_hal::subghz::{PaConfig, PaSel}; /// /// const PA_CONFIG: PaConfig = PaConfig::new().set_pa(PaSel::Lp).set_pa_duty_cycle(0x4); /// # assert_eq!(PA_CONFIG.as_slice()[1], 0x04); @@ -96,7 +96,7 @@ impl PaConfig { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{PaConfig, PaSel}; + /// use stm32wlxx_hal::subghz::{PaConfig, PaSel}; /// /// const PA_CONFIG: PaConfig = PaConfig::new().set_pa(PaSel::Hp).set_hp_max(0x2); /// # assert_eq!(PA_CONFIG.as_slice()[2], 0x02); @@ -112,7 +112,7 @@ impl PaConfig { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{PaConfig, PaSel}; + /// use stm32wlxx_hal::subghz::{PaConfig, PaSel}; /// /// const PA_CONFIG_HP: PaConfig = PaConfig::new().set_pa(PaSel::Hp); /// const PA_CONFIG_LP: PaConfig = PaConfig::new().set_pa(PaSel::Lp); @@ -130,7 +130,7 @@ impl PaConfig { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{PaConfig, PaSel}; + /// use stm32wlxx_hal::subghz::{PaConfig, PaSel}; /// /// const PA_CONFIG: PaConfig = PaConfig::new() /// .set_pa(PaSel::Hp) diff --git a/embassy-stm32/src/subghz/packet_params.rs b/embassy-stm32/src/subghz/packet_params.rs index 60b13ba4..d63641c4 100644 --- a/embassy-stm32/src/subghz/packet_params.rs +++ b/embassy-stm32/src/subghz/packet_params.rs @@ -91,7 +91,7 @@ impl GenericPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::GenericPacketParams; + /// use stm32wlxx_hal::subghz::GenericPacketParams; /// /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new(); /// assert_eq!(PKT_PARAMS, GenericPacketParams::default()); @@ -119,7 +119,7 @@ impl GenericPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::GenericPacketParams; + /// use stm32wlxx_hal::subghz::GenericPacketParams; /// /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_preamble_len(0x1234); /// # assert_eq!(PKT_PARAMS.as_slice()[1], 0x12); @@ -135,12 +135,12 @@ impl GenericPacketParams { self } - /// Preabmle detection length in number of bit symbols. + /// Preamble detection length in number of bit symbols. /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{GenericPacketParams, PreambleDetection}; + /// use stm32wlxx_hal::subghz::{GenericPacketParams, PreambleDetection}; /// /// const PKT_PARAMS: GenericPacketParams = /// GenericPacketParams::new().set_preamble_detection(PreambleDetection::Bit8); @@ -162,7 +162,7 @@ impl GenericPacketParams { /// Set the sync word length to 4 bytes (16 bits). /// /// ``` - /// use stm32wl_hal::subghz::GenericPacketParams; + /// use stm32wlxx_hal::subghz::GenericPacketParams; /// /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_sync_word_len(16); /// # assert_eq!(PKT_PARAMS.as_slice()[4], 0x10); @@ -185,7 +185,7 @@ impl GenericPacketParams { /// Enable address on the node address. /// /// ``` - /// use stm32wl_hal::subghz::{AddrComp, GenericPacketParams}; + /// use stm32wlxx_hal::subghz::{AddrComp, GenericPacketParams}; /// /// const PKT_PARAMS: GenericPacketParams = /// GenericPacketParams::new().set_addr_comp(AddrComp::Node); @@ -208,7 +208,7 @@ impl GenericPacketParams { /// Set the header type to a variable length. /// /// ``` - /// use stm32wl_hal::subghz::{GenericPacketParams, HeaderType}; + /// use stm32wlxx_hal::subghz::{GenericPacketParams, HeaderType}; /// /// const PKT_PARAMS: GenericPacketParams = /// GenericPacketParams::new().set_header_type(HeaderType::Variable); @@ -225,7 +225,7 @@ impl GenericPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::GenericPacketParams; + /// use stm32wlxx_hal::subghz::GenericPacketParams; /// /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_payload_len(12); /// # assert_eq!(PKT_PARAMS.as_slice()[7], 12); @@ -241,7 +241,7 @@ impl GenericPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CrcType, GenericPacketParams}; + /// use stm32wlxx_hal::subghz::{CrcType, GenericPacketParams}; /// /// const PKT_PARAMS: GenericPacketParams = /// GenericPacketParams::new().set_crc_type(CrcType::Byte2Inverted); @@ -260,7 +260,7 @@ impl GenericPacketParams { /// Enable whitening. /// /// ``` - /// use stm32wl_hal::subghz::GenericPacketParams; + /// use stm32wlxx_hal::subghz::GenericPacketParams; /// /// const PKT_PARAMS: GenericPacketParams = GenericPacketParams::new().set_whitening_enable(true); /// # assert_eq!(PKT_PARAMS.as_slice()[9], 1); @@ -276,7 +276,7 @@ impl GenericPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{ + /// use stm32wlxx_hal::subghz::{ /// AddrComp, CrcType, GenericPacketParams, HeaderType, PreambleDetection, /// }; /// @@ -322,7 +322,7 @@ impl LoRaPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::LoRaPacketParams; + /// use stm32wlxx_hal::subghz::LoRaPacketParams; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new(); /// assert_eq!(PKT_PARAMS, LoRaPacketParams::default()); @@ -349,7 +349,7 @@ impl LoRaPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::LoRaPacketParams; + /// use stm32wlxx_hal::subghz::LoRaPacketParams; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_preamble_len(0x1234); /// # assert_eq!(PKT_PARAMS.as_slice()[1], 0x12); @@ -372,7 +372,7 @@ impl LoRaPacketParams { /// Set the payload type to a fixed length. /// /// ``` - /// use stm32wl_hal::subghz::{HeaderType, LoRaPacketParams}; + /// use stm32wlxx_hal::subghz::{HeaderType, LoRaPacketParams}; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_header_type(HeaderType::Fixed); /// # assert_eq!(PKT_PARAMS.as_slice()[3], 0x01); @@ -388,7 +388,7 @@ impl LoRaPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::LoRaPacketParams; + /// use stm32wlxx_hal::subghz::LoRaPacketParams; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_payload_len(12); /// # assert_eq!(PKT_PARAMS.as_slice()[4], 12); @@ -406,7 +406,7 @@ impl LoRaPacketParams { /// Enable CRC. /// /// ``` - /// use stm32wl_hal::subghz::LoRaPacketParams; + /// use stm32wlxx_hal::subghz::LoRaPacketParams; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_crc_en(true); /// # assert_eq!(PKT_PARAMS.as_slice()[5], 0x1); @@ -424,7 +424,7 @@ impl LoRaPacketParams { /// Use an inverted IQ setup. /// /// ``` - /// use stm32wl_hal::subghz::LoRaPacketParams; + /// use stm32wlxx_hal::subghz::LoRaPacketParams; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new().set_invert_iq(true); /// # assert_eq!(PKT_PARAMS.as_slice()[6], 0x1); @@ -440,7 +440,7 @@ impl LoRaPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{HeaderType, LoRaPacketParams}; + /// use stm32wlxx_hal::subghz::{HeaderType, LoRaPacketParams}; /// /// const PKT_PARAMS: LoRaPacketParams = LoRaPacketParams::new() /// .set_preamble_len(5 * 8) @@ -482,7 +482,7 @@ impl BpskPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::BpskPacketParams; + /// use stm32wlxx_hal::subghz::BpskPacketParams; /// /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new(); /// assert_eq!(PKT_PARAMS, BpskPacketParams::default()); @@ -500,7 +500,7 @@ impl BpskPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::BpskPacketParams; + /// use stm32wlxx_hal::subghz::BpskPacketParams; /// /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new().set_payload_len(12); /// # assert_eq!(PKT_PARAMS.as_slice()[1], 12); @@ -516,7 +516,7 @@ impl BpskPacketParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{BpskPacketParams, HeaderType}; + /// use stm32wlxx_hal::subghz::{BpskPacketParams, HeaderType}; /// /// const PKT_PARAMS: BpskPacketParams = BpskPacketParams::new().set_payload_len(24); /// diff --git a/embassy-stm32/src/subghz/packet_status.rs b/embassy-stm32/src/subghz/packet_status.rs index a4e348d9..b3acd73c 100644 --- a/embassy-stm32/src/subghz/packet_status.rs +++ b/embassy-stm32/src/subghz/packet_status.rs @@ -5,7 +5,7 @@ use super::{Ratio, Status}; /// Returned by [`fsk_packet_status`]. /// /// [`fsk_packet_status`]: super::SubGhz::fsk_packet_status -#[derive(Debug, Clone, Copy, PartialEq, Eq)] +#[derive(Clone, Copy, PartialEq, Eq)] pub struct FskPacketStatus { buf: [u8; 4], } @@ -22,7 +22,7 @@ impl FskPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CmdStatus, FskPacketStatus, Status, StatusMode}; + /// use stm32wlxx_hal::subghz::{CmdStatus, FskPacketStatus, Status, StatusMode}; /// /// let example_data_from_radio: [u8; 4] = [0x54, 0, 0, 0]; /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio); @@ -34,32 +34,32 @@ impl FskPacketStatus { Status::from_raw(self.buf[0]) } - /// Returns `true` if a preabmle error occured. + /// Returns `true` if a preamble error occurred. pub const fn preamble_err(&self) -> bool { (self.buf[1] & (1 << 7)) != 0 } - /// Returns `true` if a synchronization error occured. + /// Returns `true` if a synchronization error occurred. pub const fn sync_err(&self) -> bool { (self.buf[1] & (1 << 6)) != 0 } - /// Returns `true` if an address error occured. + /// Returns `true` if an address error occurred. pub const fn addr_err(&self) -> bool { (self.buf[1] & (1 << 5)) != 0 } - /// Returns `true` if an crc error occured. + /// Returns `true` if an CRC error occurred. pub const fn crc_err(&self) -> bool { (self.buf[1] & (1 << 4)) != 0 } - /// Returns `true` if a length error occured. + /// Returns `true` if a length error occurred. pub const fn length_err(&self) -> bool { (self.buf[1] & (1 << 3)) != 0 } - /// Returns `true` if an abort error occured. + /// Returns `true` if an abort error occurred. pub const fn abort_err(&self) -> bool { (self.buf[1] & (1 << 2)) != 0 } @@ -74,7 +74,7 @@ impl FskPacketStatus { (self.buf[1] & 1) != 0 } - /// Returns `true` if any error occured. + /// Returns `true` if any error occurred. pub const fn any_err(&self) -> bool { (self.buf[1] & 0xFC) != 0 } @@ -86,7 +86,7 @@ impl FskPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::{subghz::FskPacketStatus, Ratio}; + /// use stm32wlxx_hal::{subghz::FskPacketStatus, Ratio}; /// /// let example_data_from_radio: [u8; 4] = [0, 0, 80, 0]; /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio); @@ -103,7 +103,7 @@ impl FskPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::{subghz::FskPacketStatus, Ratio}; + /// use stm32wlxx_hal::{subghz::FskPacketStatus, Ratio}; /// /// let example_data_from_radio: [u8; 4] = [0, 0, 0, 100]; /// let pkt_status: FskPacketStatus = FskPacketStatus::from(example_data_from_radio); @@ -147,7 +147,7 @@ impl defmt::Format for FskPacketStatus { } } -impl core::fmt::Display for FskPacketStatus { +impl core::fmt::Debug for FskPacketStatus { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { f.debug_struct("FskPacketStatus") .field("status", &self.status()) @@ -170,7 +170,7 @@ impl core::fmt::Display for FskPacketStatus { /// Returned by [`lora_packet_status`]. /// /// [`lora_packet_status`]: super::SubGhz::lora_packet_status -#[derive(Debug, Clone, Copy, PartialEq, Eq)] +#[derive(Clone, Copy, PartialEq, Eq)] pub struct LoRaPacketStatus { buf: [u8; 4], } @@ -187,7 +187,7 @@ impl LoRaPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CmdStatus, LoRaPacketStatus, Status, StatusMode}; + /// use stm32wlxx_hal::subghz::{CmdStatus, LoRaPacketStatus, Status, StatusMode}; /// /// let example_data_from_radio: [u8; 4] = [0x54, 0, 0, 0]; /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); @@ -206,7 +206,7 @@ impl LoRaPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::{subghz::LoRaPacketStatus, Ratio}; + /// use stm32wlxx_hal::{subghz::LoRaPacketStatus, Ratio}; /// /// let example_data_from_radio: [u8; 4] = [0, 80, 0, 0]; /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); @@ -223,7 +223,7 @@ impl LoRaPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::{subghz::LoRaPacketStatus, Ratio}; + /// use stm32wlxx_hal::{subghz::LoRaPacketStatus, Ratio}; /// /// let example_data_from_radio: [u8; 4] = [0, 0, 40, 0]; /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); @@ -240,7 +240,7 @@ impl LoRaPacketStatus { /// # Example /// /// ``` - /// use stm32wl_hal::{subghz::LoRaPacketStatus, Ratio}; + /// use stm32wlxx_hal::{subghz::LoRaPacketStatus, Ratio}; /// /// let example_data_from_radio: [u8; 4] = [0, 0, 0, 80]; /// let pkt_status: LoRaPacketStatus = LoRaPacketStatus::from(example_data_from_radio); @@ -270,7 +270,7 @@ impl defmt::Format for LoRaPacketStatus { } } -impl core::fmt::Display for LoRaPacketStatus { +impl core::fmt::Debug for LoRaPacketStatus { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { f.debug_struct("LoRaPacketStatus") .field("status", &self.status()) diff --git a/embassy-stm32/src/subghz/packet_type.rs b/embassy-stm32/src/subghz/packet_type.rs index 4a4e1072..88c62bb6 100644 --- a/embassy-stm32/src/subghz/packet_type.rs +++ b/embassy-stm32/src/subghz/packet_type.rs @@ -23,7 +23,7 @@ impl PacketType { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PacketType; + /// use stm32wlxx_hal::subghz::PacketType; /// /// assert_eq!(PacketType::from_raw(0), Ok(PacketType::Fsk)); /// assert_eq!(PacketType::from_raw(1), Ok(PacketType::LoRa)); diff --git a/embassy-stm32/src/subghz/pkt_ctrl.rs b/embassy-stm32/src/subghz/pkt_ctrl.rs index 0d3fa4da..265833e3 100644 --- a/embassy-stm32/src/subghz/pkt_ctrl.rs +++ b/embassy-stm32/src/subghz/pkt_ctrl.rs @@ -50,7 +50,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_sync_det_en(true); /// ``` @@ -70,7 +70,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// let pc: PktCtrl = PktCtrl::RESET; /// assert_eq!(pc.sync_det_en(), true); @@ -88,7 +88,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_cont_tx_en(true); /// ``` @@ -107,7 +107,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// let pc: PktCtrl = PktCtrl::RESET; /// assert_eq!(pc.cont_tx_en(), false); @@ -133,7 +133,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{InfSeqSel, PktCtrl}; + /// use stm32wlxx_hal::subghz::{InfSeqSel, PktCtrl}; /// /// let pc: PktCtrl = PktCtrl::RESET; /// assert_eq!(pc.inf_seq_sel(), InfSeqSel::Five); @@ -159,12 +159,12 @@ impl PktCtrl { } } - /// Enable infinute sequence generation. + /// Enable infinite sequence generation. /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_inf_seq_en(true); /// ``` @@ -178,12 +178,12 @@ impl PktCtrl { self } - /// Returns `true` if infinute sequence generation is enabled. + /// Returns `true` if infinite sequence generation is enabled. /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// let pc: PktCtrl = PktCtrl::RESET; /// assert_eq!(pc.inf_seq_en(), false); @@ -201,7 +201,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// const PKT_CTRL: PktCtrl = PktCtrl::RESET.set_whitening_init(true); /// ``` @@ -220,7 +220,7 @@ impl PktCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PktCtrl; + /// use stm32wlxx_hal::subghz::PktCtrl; /// /// let pc: PktCtrl = PktCtrl::RESET; /// assert_eq!(pc.whitening_init(), true); diff --git a/embassy-stm32/src/subghz/pwr_ctrl.rs b/embassy-stm32/src/subghz/pwr_ctrl.rs index 2e188a96..974bddeb 100644 --- a/embassy-stm32/src/subghz/pwr_ctrl.rs +++ b/embassy-stm32/src/subghz/pwr_ctrl.rs @@ -21,7 +21,7 @@ impl CurrentLim { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::CurrentLim; + /// use stm32wlxx_hal::subghz::CurrentLim; /// /// assert_eq!(CurrentLim::Milli25.as_milliamps(), 25); /// assert_eq!(CurrentLim::Milli50.as_milliamps(), 50); @@ -74,7 +74,7 @@ impl PwrCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PwrCtrl; + /// use stm32wlxx_hal::subghz::PwrCtrl; /// /// const PWR_CTRL: PwrCtrl = PwrCtrl::RESET.set_current_lim_en(true); /// # assert_eq!(u8::from(PWR_CTRL), 0x50u8); @@ -94,7 +94,7 @@ impl PwrCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::PwrCtrl; + /// use stm32wlxx_hal::subghz::PwrCtrl; /// /// let pc: PwrCtrl = PwrCtrl::RESET; /// assert_eq!(pc.current_limit_en(), true); @@ -120,7 +120,7 @@ impl PwrCtrl { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CurrentLim, PwrCtrl}; + /// use stm32wlxx_hal::subghz::{CurrentLim, PwrCtrl}; /// /// let pc: PwrCtrl = PwrCtrl::RESET; /// assert_eq!(pc.current_lim(), CurrentLim::Milli50); diff --git a/embassy-stm32/src/subghz/rf_frequency.rs b/embassy-stm32/src/subghz/rf_frequency.rs index 520dc89d..3de2f50c 100644 --- a/embassy-stm32/src/subghz/rf_frequency.rs +++ b/embassy-stm32/src/subghz/rf_frequency.rs @@ -15,7 +15,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// assert_eq!(RfFreq::F915.freq(), 915_000_000); /// ``` @@ -26,7 +26,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// assert_eq!(RfFreq::F868.freq(), 868_000_000); /// ``` @@ -37,7 +37,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// assert_eq!(RfFreq::F433.freq(), 433_000_000); /// ``` @@ -52,7 +52,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// const FREQ: RfFreq = RfFreq::from_raw(0x39300000); /// assert_eq!(FREQ, RfFreq::F915); @@ -78,7 +78,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// const FREQ: RfFreq = RfFreq::from_frequency(915_000_000); /// assert_eq!(FREQ, RfFreq::F915); @@ -97,7 +97,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// assert_eq!(RfFreq::from_raw(0x39300000).freq(), 915_000_000); /// ``` @@ -110,7 +110,7 @@ impl RfFreq { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::RfFreq; + /// use stm32wlxx_hal::subghz::RfFreq; /// /// assert_eq!(RfFreq::F915.as_slice(), &[0x86, 0x39, 0x30, 0x00, 0x00]); /// ``` diff --git a/embassy-stm32/src/subghz/sleep_cfg.rs b/embassy-stm32/src/subghz/sleep_cfg.rs index 2d2fe0c9..0a50e970 100644 --- a/embassy-stm32/src/subghz/sleep_cfg.rs +++ b/embassy-stm32/src/subghz/sleep_cfg.rs @@ -42,7 +42,7 @@ impl SleepCfg { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::SleepCfg; + /// use stm32wlxx_hal::subghz::SleepCfg; /// /// const SLEEP_CFG: SleepCfg = SleepCfg::new(); /// assert_eq!(SLEEP_CFG, SleepCfg::default()); @@ -57,7 +57,7 @@ impl SleepCfg { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{SleepCfg, Startup}; + /// use stm32wlxx_hal::subghz::{SleepCfg, Startup}; /// /// const SLEEP_CFG: SleepCfg = SleepCfg::new().set_startup(Startup::Cold); /// # assert_eq!(u8::from(SLEEP_CFG), 0b001); @@ -77,7 +77,7 @@ impl SleepCfg { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::SleepCfg; + /// use stm32wlxx_hal::subghz::SleepCfg; /// /// const SLEEP_CFG: SleepCfg = SleepCfg::new().set_rtc_wakeup_en(false); /// # assert_eq!(u8::from(SLEEP_CFG), 0b100); diff --git a/embassy-stm32/src/subghz/smps.rs b/embassy-stm32/src/subghz/smps.rs index 3d843b01..81615ea7 100644 --- a/embassy-stm32/src/subghz/smps.rs +++ b/embassy-stm32/src/subghz/smps.rs @@ -21,7 +21,7 @@ impl SmpsDrv { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::SmpsDrv; + /// use stm32wlxx_hal::subghz::SmpsDrv; /// /// assert_eq!(SmpsDrv::Milli20.as_milliamps(), 20); /// assert_eq!(SmpsDrv::Milli40.as_milliamps(), 40); diff --git a/embassy-stm32/src/subghz/stats.rs b/embassy-stm32/src/subghz/stats.rs index 46dc2bdf..41b7a200 100644 --- a/embassy-stm32/src/subghz/stats.rs +++ b/embassy-stm32/src/subghz/stats.rs @@ -26,7 +26,7 @@ impl FskStats { /// /// [`fsk_stats`]: super::SubGhz::fsk_stats /// [`lora_stats`]: super::SubGhz::lora_stats -#[derive(Debug, Eq, PartialEq, Clone, Copy)] +#[derive(Eq, PartialEq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct Stats<ModType> { status: Status, @@ -52,7 +52,7 @@ impl<ModType> Stats<ModType> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CmdStatus, FskStats, Stats, StatusMode}; + /// use stm32wlxx_hal::subghz::{CmdStatus, FskStats, Stats, StatusMode}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0]; /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); @@ -68,7 +68,7 @@ impl<ModType> Stats<ModType> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskStats, Stats}; + /// use stm32wlxx_hal::subghz::{FskStats, Stats}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 3, 0, 0, 0, 0]; /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); @@ -83,7 +83,7 @@ impl<ModType> Stats<ModType> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{LoRaStats, Stats}; + /// use stm32wlxx_hal::subghz::{LoRaStats, Stats}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 1, 0, 0]; /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio); @@ -100,7 +100,7 @@ impl Stats<FskStats> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskStats, Stats}; + /// use stm32wlxx_hal::subghz::{FskStats, Stats}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0]; /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); @@ -114,7 +114,7 @@ impl Stats<FskStats> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{FskStats, Stats}; + /// use stm32wlxx_hal::subghz::{FskStats, Stats}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 1]; /// let stats: Stats<FskStats> = Stats::from_raw_fsk(example_data_from_radio); @@ -131,7 +131,7 @@ impl Stats<LoRaStats> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{LoRaStats, Stats}; + /// use stm32wlxx_hal::subghz::{LoRaStats, Stats}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 0]; /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio); @@ -145,7 +145,7 @@ impl Stats<LoRaStats> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{LoRaStats, Stats}; + /// use stm32wlxx_hal::subghz::{LoRaStats, Stats}; /// /// let example_data_from_radio: [u8; 7] = [0x54, 0, 0, 0, 0, 0, 1]; /// let stats: Stats<LoRaStats> = Stats::from_raw_lora(example_data_from_radio); @@ -156,7 +156,7 @@ impl Stats<LoRaStats> { } } -impl core::fmt::Display for Stats<FskStats> { +impl core::fmt::Debug for Stats<FskStats> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { f.debug_struct("Stats") .field("status", &self.status()) diff --git a/embassy-stm32/src/subghz/status.rs b/embassy-stm32/src/subghz/status.rs index 10a212b9..b84034f6 100644 --- a/embassy-stm32/src/subghz/status.rs +++ b/embassy-stm32/src/subghz/status.rs @@ -1,6 +1,6 @@ /// sub-GHz radio operating mode. /// -/// See `Get_Status` under section 5.8.5 "Communcation status information commands" +/// See `Get_Status` under section 5.8.5 "Communication status information commands" /// in the reference manual. /// /// This is returned by [`Status::mode`]. @@ -26,7 +26,7 @@ impl StatusMode { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::StatusMode; + /// use stm32wlxx_hal::subghz::StatusMode; /// /// assert_eq!(StatusMode::from_raw(0x2), Ok(StatusMode::StandbyRc)); /// assert_eq!(StatusMode::from_raw(0x3), Ok(StatusMode::StandbyHse)); @@ -50,7 +50,7 @@ impl StatusMode { /// Command status. /// -/// See `Get_Status` under section 5.8.5 "Communcation status information commands" +/// See `Get_Status` under section 5.8.5 "Communication status information commands" /// in the reference manual. /// /// This is returned by [`Status::cmd`]. @@ -89,7 +89,7 @@ impl CmdStatus { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::CmdStatus; + /// use stm32wlxx_hal::subghz::CmdStatus; /// /// assert_eq!(CmdStatus::from_raw(0x2), Ok(CmdStatus::Avaliable)); /// assert_eq!(CmdStatus::from_raw(0x3), Ok(CmdStatus::Timeout)); @@ -116,7 +116,7 @@ impl CmdStatus { /// This is returned by [`status`]. /// /// [`status`]: super::SubGhz::status -#[derive(Debug, PartialEq, Eq, Clone, Copy)] +#[derive(PartialEq, Eq, Clone, Copy)] pub struct Status(u8); impl From<u8> for Status { @@ -138,7 +138,7 @@ impl Status { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CmdStatus, Status, StatusMode}; + /// use stm32wlxx_hal::subghz::{CmdStatus, Status, StatusMode}; /// /// const STATUS: Status = Status::from_raw(0x54_u8); /// assert_eq!(STATUS.mode(), Ok(StatusMode::Rx)); @@ -153,7 +153,7 @@ impl Status { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{Status, StatusMode}; + /// use stm32wlxx_hal::subghz::{Status, StatusMode}; /// /// let status: Status = 0xACu8.into(); /// assert_eq!(status.mode(), Ok(StatusMode::StandbyRc)); @@ -164,13 +164,13 @@ impl Status { /// Command status. /// - /// For some reason `Err(1)` is a pretty common return value for this, - /// despite being a reserved value. + /// This method frequently returns reserved values such as `Err(1)`. + /// ST support has confirmed that this is normal and should be ignored. /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{CmdStatus, Status}; + /// use stm32wlxx_hal::subghz::{CmdStatus, Status}; /// /// let status: Status = 0xACu8.into(); /// assert_eq!(status.cmd(), Ok(CmdStatus::Complete)); @@ -180,7 +180,7 @@ impl Status { } } -impl core::fmt::Display for Status { +impl core::fmt::Debug for Status { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { f.debug_struct("Status") .field("mode", &self.mode()) diff --git a/embassy-stm32/src/subghz/tcxo_mode.rs b/embassy-stm32/src/subghz/tcxo_mode.rs index 64d7d329..698dee0a 100644 --- a/embassy-stm32/src/subghz/tcxo_mode.rs +++ b/embassy-stm32/src/subghz/tcxo_mode.rs @@ -49,7 +49,7 @@ impl TcxoTrim { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::TcxoTrim; + /// use stm32wlxx_hal::subghz::TcxoTrim; /// /// assert_eq!(TcxoTrim::Volts1pt6.as_millivolts(), 1600); /// assert_eq!(TcxoTrim::Volts1pt7.as_millivolts(), 1700); @@ -93,7 +93,7 @@ impl TcxoMode { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::TcxoMode; + /// use stm32wlxx_hal::subghz::TcxoMode; /// /// const TCXO_MODE: TcxoMode = TcxoMode::new(); /// ``` @@ -111,7 +111,7 @@ impl TcxoMode { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{TcxoMode, TcxoTrim}; + /// use stm32wlxx_hal::subghz::{TcxoMode, TcxoTrim}; /// /// const TCXO_MODE: TcxoMode = TcxoMode::new().set_txco_trim(TcxoTrim::Volts1pt6); /// # assert_eq!(TCXO_MODE.as_slice()[1], 0x00); @@ -128,7 +128,7 @@ impl TcxoMode { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::{TcxoMode, Timeout}; + /// use stm32wlxx_hal::subghz::{TcxoMode, Timeout}; /// /// // 15.625 ms timeout /// const TIMEOUT: Timeout = Timeout::from_duration_sat(Duration::from_millis(15_625)); @@ -151,7 +151,7 @@ impl TcxoMode { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{TcxoMode, TcxoTrim, Timeout}; + /// use stm32wlxx_hal::subghz::{TcxoMode, TcxoTrim, Timeout}; /// /// const TCXO_MODE: TcxoMode = TcxoMode::new() /// .set_txco_trim(TcxoTrim::Volts1pt7) diff --git a/embassy-stm32/src/subghz/timeout.rs b/embassy-stm32/src/subghz/timeout.rs index 2a0f5b85..9dbdc637 100644 --- a/embassy-stm32/src/subghz/timeout.rs +++ b/embassy-stm32/src/subghz/timeout.rs @@ -1,6 +1,6 @@ use core::time::Duration; -use crate::subghz::value_error::ValueError; +use super::ValueError; const fn abs_diff(a: u64, b: u64) -> u64 { if a > b { @@ -20,9 +20,9 @@ const fn abs_diff(a: u64, b: u64) -> u64 { /// Each timeout has 3 bytes, with a resolution of 15.625µs per bit, giving a /// range of 0s to 262.143984375s. /// -/// [`set_rx`]: crate::subghz::SubGhz::set_rx -/// [`set_tx`]: crate::subghz::SubGhz::set_tx -/// [`TcxoMode`]: crate::subghz::TcxoMode +/// [`set_rx`]: super::SubGhz::set_rx +/// [`set_tx`]: super::SubGhz::set_tx +/// [`TcxoMode`]: super::TcxoMode #[derive(Debug, PartialEq, Eq, PartialOrd, Ord, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct Timeout { @@ -39,7 +39,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// const TIMEOUT: Timeout = Timeout::DISABLED; /// assert_eq!(TIMEOUT.as_duration(), Duration::from_secs(0)); @@ -52,7 +52,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// const TIMEOUT: Timeout = Timeout::MIN; /// assert_eq!(TIMEOUT.into_bits(), 1); @@ -65,7 +65,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// const TIMEOUT: Timeout = Timeout::MAX; /// assert_eq!(TIMEOUT.as_duration(), Duration::from_nanos(262_143_984_375)); @@ -80,7 +80,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!( /// Timeout::RESOLUTION.as_nanos(), @@ -97,7 +97,7 @@ impl Timeout { /// Use [`from_millis_sat`](Self::from_millis_sat) for runtime timeout /// construction. /// This is not _that_ useful right now, it is simply future proofing for a - /// time when `Result::unwrap` is avaliable for `const fn`. + /// time when `Result::unwrap` is available for `const fn`. /// /// # Example /// @@ -105,7 +105,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::{Timeout, ValueError}; + /// use stm32wlxx_hal::subghz::{Timeout, ValueError}; /// /// const MIN: Duration = Timeout::RESOLUTION; /// assert_eq!(Timeout::from_duration(MIN).unwrap(), Timeout::MIN); @@ -115,7 +115,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::{Timeout, ValueError}; + /// use stm32wlxx_hal::subghz::{Timeout, ValueError}; /// /// const LOWER_LIMIT_NANOS: u128 = 7813; /// const TOO_LOW_NANOS: u128 = LOWER_LIMIT_NANOS - 1; @@ -130,7 +130,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::{Timeout, ValueError}; + /// use stm32wlxx_hal::subghz::{Timeout, ValueError}; /// /// const UPPER_LIMIT_NANOS: u128 = Timeout::MAX.as_nanos() as u128 + 7812; /// const TOO_HIGH_NANOS: u128 = UPPER_LIMIT_NANOS + 1; @@ -186,7 +186,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// const DURATION_MAX_NS: u64 = 262_143_984_376; /// @@ -245,7 +245,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::from_millis_sat(0), Timeout::MIN); /// assert_eq!(Timeout::from_millis_sat(262_144), Timeout::MAX); @@ -270,7 +270,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::from_raw(u32::MAX), Timeout::MAX); /// assert_eq!(Timeout::from_raw(0x00_FF_FF_FF), Timeout::MAX); @@ -288,7 +288,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::MAX.as_nanos(), 262_143_984_375); /// assert_eq!(Timeout::DISABLED.as_nanos(), 0); @@ -304,7 +304,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::MAX.as_micros(), 262_143_984); /// assert_eq!(Timeout::DISABLED.as_micros(), 0); @@ -320,7 +320,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::MAX.as_millis(), 262_143); /// assert_eq!(Timeout::DISABLED.as_millis(), 0); @@ -336,7 +336,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::MAX.as_secs(), 262); /// assert_eq!(Timeout::DISABLED.as_secs(), 0); @@ -353,7 +353,7 @@ impl Timeout { /// /// ``` /// use core::time::Duration; - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!( /// Timeout::MAX.as_duration(), @@ -371,7 +371,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::from_raw(u32::MAX).into_bits(), 0x00FF_FFFF); /// assert_eq!(Timeout::from_raw(1).into_bits(), 1); @@ -385,7 +385,7 @@ impl Timeout { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::Timeout; + /// use stm32wlxx_hal::subghz::Timeout; /// /// assert_eq!(Timeout::from_raw(u32::MAX).as_bytes(), [0xFF, 0xFF, 0xFF]); /// assert_eq!(Timeout::from_raw(1).as_bytes(), [0, 0, 1]); @@ -397,6 +397,34 @@ impl Timeout { (self.bits & 0xFF) as u8, ] } + + /// Saturating timeout addition. Computes `self + rhs`, saturating at the + /// numeric bounds instead of overflowing. + /// + /// # Example + /// + /// ``` + /// use stm32wlxx_hal::subghz::Timeout; + /// + /// assert_eq!( + /// Timeout::from_raw(0xFF_FF_F0).saturating_add(Timeout::from_raw(0xFF)), + /// Timeout::from_raw(0xFF_FF_FF) + /// ); + /// assert_eq!( + /// Timeout::from_raw(100).saturating_add(Timeout::from_raw(23)), + /// Timeout::from_raw(123) + /// ); + /// ``` + #[must_use = "saturating_add returns a new Timeout"] + pub const fn saturating_add(self, rhs: Self) -> Self { + // TODO: use core::cmp::min when it is const + let bits: u32 = self.bits.saturating_add(rhs.bits); + if bits > Self::MAX.bits { + Self::MAX + } else { + Self { bits } + } + } } impl From<Timeout> for Duration { diff --git a/embassy-stm32/src/subghz/tx_params.rs b/embassy-stm32/src/subghz/tx_params.rs index 278d49bf..5194a837 100644 --- a/embassy-stm32/src/subghz/tx_params.rs +++ b/embassy-stm32/src/subghz/tx_params.rs @@ -100,7 +100,7 @@ impl TxParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::TxParams; + /// use stm32wlxx_hal::subghz::TxParams; /// /// const TX_PARAMS: TxParams = TxParams::new(); /// assert_eq!(TX_PARAMS, TxParams::default()); @@ -136,7 +136,7 @@ impl TxParams { /// Set the output power to 0 dB. /// /// ``` - /// use stm32wl_hal::subghz::{RampTime, TxParams}; + /// use stm32wlxx_hal::subghz::{RampTime, TxParams}; /// /// const TX_PARAMS: TxParams = TxParams::new().set_power(0x00); /// # assert_eq!(TX_PARAMS.as_slice()[1], 0x00); @@ -156,7 +156,7 @@ impl TxParams { /// Set the ramp time to 200 microseconds. /// /// ``` - /// use stm32wl_hal::subghz::{RampTime, TxParams}; + /// use stm32wlxx_hal::subghz::{RampTime, TxParams}; /// /// const TX_PARAMS: TxParams = TxParams::new().set_ramp_time(RampTime::Micros200); /// # assert_eq!(TX_PARAMS.as_slice()[2], 0x04); @@ -172,7 +172,7 @@ impl TxParams { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::{RampTime, TxParams}; + /// use stm32wlxx_hal::subghz::{RampTime, TxParams}; /// /// const TX_PARAMS: TxParams = TxParams::new() /// .set_ramp_time(RampTime::Micros80) diff --git a/embassy-stm32/src/subghz/value_error.rs b/embassy-stm32/src/subghz/value_error.rs index 8ad91008..6a0b489a 100644 --- a/embassy-stm32/src/subghz/value_error.rs +++ b/embassy-stm32/src/subghz/value_error.rs @@ -14,13 +14,13 @@ pub struct ValueError<T> { impl<T> ValueError<T> { /// Create a new `ValueError` for a value that exceeded an upper bound. /// - /// Unfortunately panic is not avaliable in `const fn`, so there are no + /// Unfortunately panic is not available in `const fn`, so there are no /// guarantees on the value being greater than the limit. /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::ValueError; + /// use stm32wlxx_hal::subghz::ValueError; /// /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); /// assert!(ERROR.over()); @@ -36,13 +36,13 @@ impl<T> ValueError<T> { /// Create a new `ValueError` for a value that exceeded a lower bound. /// - /// Unfortunately panic is not avaliable in `const fn`, so there are no + /// Unfortunately panic is not available in `const fn`, so there are no /// guarantees on the value being less than the limit. /// /// # Example /// /// ``` - /// use stm32wl_hal::subghz::ValueError; + /// use stm32wlxx_hal::subghz::ValueError; /// /// const ERROR: ValueError<u8> = ValueError::too_low(200u8, 201u8); /// assert!(ERROR.under()); @@ -61,7 +61,7 @@ impl<T> ValueError<T> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::ValueError; + /// use stm32wlxx_hal::subghz::ValueError; /// /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); /// assert_eq!(ERROR.value(), &101u8); @@ -75,7 +75,7 @@ impl<T> ValueError<T> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::ValueError; + /// use stm32wlxx_hal::subghz::ValueError; /// /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); /// assert_eq!(ERROR.limit(), &100u8); @@ -89,7 +89,7 @@ impl<T> ValueError<T> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::ValueError; + /// use stm32wlxx_hal::subghz::ValueError; /// /// const ERROR: ValueError<u8> = ValueError::too_high(101u8, 100u8); /// assert!(ERROR.over()); @@ -104,7 +104,7 @@ impl<T> ValueError<T> { /// # Example /// /// ``` - /// use stm32wl_hal::subghz::ValueError; + /// use stm32wlxx_hal::subghz::ValueError; /// /// const ERROR: ValueError<u8> = ValueError::too_low(200u8, 201u8); /// assert!(ERROR.under()); |