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authorTarik Graba <tarikgraba@users.noreply.github.com>2021-02-11 20:35:25 +0100
committerGitHub <noreply@github.com>2021-02-11 19:35:25 +0000
commitea72d66b6d4e3f0dc04d12fba08fe29e7e637b72 (patch)
tree34d8a89480492bb36a55d55c73d860a2225b7421 /test/handler/test_verilator_handler.vader
parent1773a496ad39fdd3d904679955b39357f3f38442 (diff)
downloadale-ea72d66b6d4e3f0dc04d12fba08fe29e7e637b72.zip
Verilator current file search path (#3500)
* Simplify verilator linter using ale command format strings * Verilator Linter: Restructure linter command tests * Verilator Linter: adds to the handler test the returned filename * Verilator Linter: add the current file path to the search path * Verilator Linter: Add the search path to the tests Co-authored-by: TG <tarik.graba@telecom-paris.fr>
Diffstat (limited to 'test/handler/test_verilator_handler.vader')
-rw-r--r--test/handler/test_verilator_handler.vader20
1 files changed, 12 insertions, 8 deletions
diff --git a/test/handler/test_verilator_handler.vader b/test/handler/test_verilator_handler.vader
index 5e51b5c9..59ec1361 100644
--- a/test/handler/test_verilator_handler.vader
+++ b/test/handler/test_verilator_handler.vader
@@ -11,17 +11,19 @@ Execute (The verilator handler should parse legacy messages with only line numbe
\ {
\ 'lnum': 3,
\ 'type': 'E',
- \ 'text': 'syntax error, unexpected IDENTIFIER'
+ \ 'text': 'syntax error, unexpected IDENTIFIER',
+ \ 'filename': 'foo.v'
\ },
\ {
\ 'lnum': 10,
\ 'type': 'W',
- \ 'text': 'Blocking assignments (=) in sequential (flop or latch) block; suggest delayed assignments (<=).'
+ \ 'text': 'Blocking assignments (=) in sequential (flop or latch) block; suggest delayed assignments (<=).',
+ \ 'filename': 'bar.v'
\ },
\ ],
\ ale_linters#verilog#verilator#Handle(bufnr(''), [
- \ '%Error: foo_verilator_linted.v:3: syntax error, unexpected IDENTIFIER',
- \ '%Warning-BLKSEQ: bar_verilator_linted.v:10: Blocking assignments (=) in sequential (flop or latch) block; suggest delayed assignments (<=).',
+ \ '%Error: foo.v:3: syntax error, unexpected IDENTIFIER',
+ \ '%Warning-BLKSEQ: bar.v:10: Blocking assignments (=) in sequential (flop or latch) block; suggest delayed assignments (<=).',
\ ])
@@ -32,17 +34,19 @@ Execute (The verilator handler should parse new format messages with line and co
\ 'lnum': 3,
\ 'col' : 1,
\ 'type': 'E',
- \ 'text': 'syntax error, unexpected endmodule, expecting ;'
+ \ 'text': 'syntax error, unexpected endmodule, expecting ;',
+ \ 'filename': 'bar.v'
\ },
\ {
\ 'lnum': 4,
\ 'col' : 6,
\ 'type': 'W',
- \ 'text': 'Signal is not used: r'
+ \ 'text': 'Signal is not used: r',
+ \ 'filename': 'foo.v'
\ },
\ ],
\ ale_linters#verilog#verilator#Handle(bufnr(''), [
- \ '%Error: bar_verilator_linted.v:3:1: syntax error, unexpected endmodule, expecting ;',
- \ '%Warning-UNUSED: foo_verilator_linted.v:4:6: Signal is not used: r',
+ \ '%Error: bar.v:3:1: syntax error, unexpected endmodule, expecting ;',
+ \ '%Warning-UNUSED: foo.v:4:6: Signal is not used: r',
\ ])