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authorNathan Sharp <39231199+nwsharp@users.noreply.github.com>2021-07-12 06:39:53 -0600
committerGitHub <noreply@github.com>2021-07-12 21:39:53 +0900
commitc8f669249ae064aa014ec180df3934f0a82cab29 (patch)
tree3ba9d4e7e7d25cfddde068b4b868a5cde2da8ce5 /doc
parent9a9fd24b17db32e452609e68e6a9729461625720 (diff)
downloadale-c8f669249ae064aa014ec180df3934f0a82cab29.zip
Add Yosys linter for Verilog files. (#3713)
* Add yosys for verilog files. * Add handler test for yosys. * fix typo in yosys handler test * fix array order in yosys handler test * add yosys linter to filetype defaults test * fix duplicate tag * add 'yosys' to 'ale-supported-languages-and-tools.txt'
Diffstat (limited to 'doc')
-rw-r--r--doc/ale-supported-languages-and-tools.txt1
-rw-r--r--doc/ale-verilog.txt26
-rw-r--r--doc/ale.txt1
3 files changed, 27 insertions, 1 deletions
diff --git a/doc/ale-supported-languages-and-tools.txt b/doc/ale-supported-languages-and-tools.txt
index 639e1833..283caf06 100644
--- a/doc/ale-supported-languages-and-tools.txt
+++ b/doc/ale-supported-languages-and-tools.txt
@@ -550,6 +550,7 @@ Notes:
* `verilator`
* `vlog`
* `xvlog`
+ * `yosys`
* VHDL
* `ghdl`
* `vcom`
diff --git a/doc/ale-verilog.txt b/doc/ale-verilog.txt
index 01af63c2..11e988bb 100644
--- a/doc/ale-verilog.txt
+++ b/doc/ale-verilog.txt
@@ -3,7 +3,7 @@ ALE Verilog/SystemVerilog Integration *ale-verilog-options*
===============================================================================
-ALE can use five different linters for Verilog HDL:
+ALE can use six different linters for Verilog HDL:
HDL Checker
Using `hdl_checker --lsp`
@@ -20,6 +20,9 @@ ALE can use five different linters for Verilog HDL:
Vivado
Using `xvlog`
+ Yosys
+ Using `ysoys -Q -T -p 'read_verilog'`
+
By default, both 'verilog' and 'systemverilog' filetypes are checked.
You can limit 'systemverilog' files to be checked using only 'verilator' by
@@ -115,4 +118,25 @@ g:ale_verilog_xvlog_options *g:ale_verilog_xvlog_options*
===============================================================================
+yosys *ale-verilog-yosys*
+
+g:ale_verilog_yosys_executable *g:ale_verilog_yosys_executable*
+ *b:ale_verilog_yosys_executable*
+ Type: |String|
+ Default: `'yosys'`
+
+ This variable can be changed to the path to the 'yosys' executable.
+
+
+g:ale_verilog_yosys_options *g:ale_verilog_yosys_options*
+ *b:ale_verilog_yosys_options*
+ Type: |String|
+ Default: `'-Q -T -p ''read_verilog %s'''`
+
+ This variable can be changed to modify the flags/options passed to 'yosys'.
+ By default, Yosys is an interative program. To obtain linting functionality,
+ the `'read_verilog'` command is used.
+
+
+===============================================================================
vim:tw=78:ts=2:sts=2:sw=2:ft=help:norl:
diff --git a/doc/ale.txt b/doc/ale.txt
index 53dd2ea2..f2800ff0 100644
--- a/doc/ale.txt
+++ b/doc/ale.txt
@@ -3067,6 +3067,7 @@ documented in additional help files.
verilator.............................|ale-verilog-verilator|
vlog..................................|ale-verilog-vlog|
xvlog.................................|ale-verilog-xvlog|
+ yosys.................................|ale-verilog-yosys|
vhdl....................................|ale-vhdl-options|
ghdl..................................|ale-vhdl-ghdl|
hdl-checker...........................|ale-vhdl-hdl-checker|