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author | w0rp <devw0rp@gmail.com> | 2017-07-08 14:17:26 +0100 |
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committer | w0rp <devw0rp@gmail.com> | 2017-07-08 14:17:26 +0100 |
commit | fdc7166c3ce68babdf8afdb457e23700d4e8ab3a (patch) | |
tree | 16f5b15d5bc13c0a96d534c8c98c1db575b44eec /doc/ale-verilog.txt | |
parent | f9aa7d3b9a030468e744ddc568a8d35492d04a99 (diff) | |
download | ale-fdc7166c3ce68babdf8afdb457e23700d4e8ab3a.zip |
Use equal signs for language documentation sections
Diffstat (limited to 'doc/ale-verilog.txt')
-rw-r--r-- | doc/ale-verilog.txt | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/doc/ale-verilog.txt b/doc/ale-verilog.txt index 6566ad42..2b8ce5e2 100644 --- a/doc/ale-verilog.txt +++ b/doc/ale-verilog.txt @@ -2,7 +2,7 @@ ALE Verilog/SystemVerilog Integration *ale-verilog-options* -------------------------------------------------------------------------------- +=============================================================================== ALE can use two different linters for Verilog HDL: iverilog: @@ -20,13 +20,13 @@ defining 'g:ale_linters' variable: \ let g:ale_linters = {'systemverilog' : ['verilator'],} < -------------------------------------------------------------------------------- +=============================================================================== iverilog *ale-verilog-iverilog* No additional options -------------------------------------------------------------------------------- +=============================================================================== verilator *ale-verilog-verilator* g:ale_verilog_verilator_options *g:ale_verilog_verilator_options* @@ -39,5 +39,5 @@ g:ale_verilog_verilator_options *g:ale_verilog_verilator_options* For example `'-sv --default-language "1800-2012"'` if you want to enable SystemVerilog parsing and select the 2012 version of the language. -------------------------------------------------------------------------------- +=============================================================================== vim:tw=78:ts=2:sts=2:sw=2:ft=help:norl: |